LCD Clock Generator Circuit Using Charge Sharing Switch Unit

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Solution Overview

Problem

Conventional clock generator circuits in liquid crystal display devices consume increasing amounts of electric power as the size of the displays grows, due to the need for more clock signals, which is a concern for energy efficiency.

Innovation Solution

A clock generator circuit design that includes a charge sharing switch unit, capacitors, and multiple switches to selectively output voltage levels based on control signals, allowing for efficient storage and output of clock signals, reducing power consumption by utilizing the voltages of display data for charge sharing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the size of liquid crystal display device is increased, then the display area is improved, but the power consumption increases due to more clock signals required

Engineering Contradiction:
Improvedisplay areaVSAvoidpower consumption
Core Design Contradiction:
Area of stationary objectVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-charging capacitors with voltages from display data lines before clock signal generation. The charge sharing switch unit captures and stores voltage information from data lines in advance, then shares these charges to generate clock signals, eliminating the need for high-voltage external power supply during clock generation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements self-service by having the clock generator circuit use its own internal resources (voltages from display data lines) to generate clock signals. The circuit harvests electrical energy from the display data lines themselves, making the system self-sufficient and reducing external power requirements.

Inventive Principle:
Principle #25Self-service

2Adaptability or versatility

If conventional clock generator circuit is used to provide more clock signals for larger display, then the clock signal coverage is improved, but the power consumption increases

Engineering Contradiction:
Improveclock signal coverageVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent applies universality by making the clock generator circuit multi-functional. It can generate multiple clock signals with different phases and voltage levels using a single integrated circuit that shares common components (capacitors, switches, charge sharing unit) across different clock signal generation paths, thereby reducing overall power consumption while maintaining comprehensive clock signal coverage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements discarding and recovering by capturing and reusing voltage information from display data lines that would otherwise be discarded. The charge sharing switch unit recovers electrical energy from the data lines during the clock signal generation process, converting waste energy into useful clock signals.

Inventive Principle:
Principle #34Discarding and recovering

3Device complexity

If external electric power is converted to high and low voltage levels for clock signals, then the clock signal generation is simplified, but the power consumption increases

Engineering Contradiction:
Improveclock signal generation complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent applies mechanics substitution by replacing the conventional electrical power conversion mechanism with an electrostatic charge sharing mechanism. Instead of using active power conversion circuits to generate high and low voltage levels, the system uses passive capacitor charging and discharging through controlled switches, eliminating the need for high-power voltage conversion hardware.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements parameter changes by dynamically adjusting voltage levels based on the actual display data being transmitted. The clock signal voltage parameters are modulated to match the data line voltages, allowing the system to adapt its power consumption characteristics to the current operating conditions rather than maintaining fixed high voltage levels.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design significantly reduces the voltage requirements for clock signals, achieving power savings by optimizing the generation and distribution of clock signals in liquid crystal display devices.

Implementation Method 1

The first capacitor has a first end and a second end. The first end of the first capacitor is electrically coupled to the output end of the charge sharing switch unit and the second end of the first capacitor is electrically coupled to a first low voltage level.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The charge sharing switch unit is configured to receive a first control signal and output, through the output end thereof, a first-polarity voltage according to the first control signal. The first-polarity voltage is constituted by voltages of a plurality of first-polarity display data transmitted on the data lines.

Methodology Applied
Scientific EffectCharge sharing: Conduction (electrical)

Data Source

PatentUS9607564B2Clock generator circuit of liquid crystal display device and operation method thereof
Publication Date: 2017.03.28 AU OPTRONICS CORP
  • US9607564B2 patent drawing
  • US9607564B2 patent drawing
  • US9607564B2 patent drawing

AI summary

A clock generator circuit of a liquid display panel includes a charge sharing switch unit, a first capacitor, a first switch, a second switch, a third switch and a fourth switch. The charge sharing switch unit is configured to receive control signals and accordingly output a first-polarity voltage to the first capacitor. The clock generator circuit is configured to turn on the first switch, the second switch, the third switch and the fourth switch according to a specific sequence thereby outputting a clock signal. An operation method for the aforementioned clock generator circuit is also provided.