Horizontal Electric Field LCD Common Electrode Segmentation
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Solution Overview
Problem
Liquid crystal display devices of the horizontal electric field type face limitations in aperture ratio due to the use of opaque metal for common electrodes, leading to reduced capacitance and manufacturing productivity issues caused by short generation during the complex and multi-step fabrication process.
Innovation Solution
The solution involves forming a gate pattern with symmetrical gate lines and incorporating first and second short preventive holes to prevent short generation between wirings, allowing for increased capacitance through parallel storage capacitors and improved aperture ratio by reducing the horizontal area of opaque metal, thus enhancing manufacturing productivity without additional inspection steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If opaque metal is used for common electrodes, then electrical conductivity is improved, but aperture ratio deteriorates
Solution Approach 1:
The patent divides the continuous common electrode into multiple separate common electrodes positioned at different locations. This segmentation allows light to pass through the gaps between them, increasing the aperture ratio while maintaining electrical conductivity through the distributed electrode structure
Solution Approach 2:
The patent applies different properties to different parts of the electrode structure. The common electrodes are made opaque for conductivity where needed, but their distributed positioning creates transparent regions, achieving local optimization of both conductivity and light transmission
2Manufacturing precision
If complex multi-step fabrication process is used, then manufacturing precision is improved, but productivity deteriorates
Solution Approach 1:
The patent combines multiple fabrication steps into fewer steps by designing a gate pattern that can be formed in a single photolithography and etching process. The symmetrical gate lines and short preventive holes are created together, eliminating the need for separate inspection and correction steps
Solution Approach 2:
The symmetrical gate line design with built-in short preventive holes creates a self-checking structure. The design itself prevents short generation, eliminating the need for additional inspection steps and enabling direct progression to the next fabrication stage
3Reliability
If additional inspection steps are added, then reliability is improved, but productivity deteriorates
Solution Approach 1:
The patent incorporates short preventive holes directly into the gate pattern design during the initial fabrication step. This preliminary action prevents short generation before it can occur, eliminating the need for subsequent inspection and correction steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the capacitance of storage capacitors, improves the aperture ratio, and simplifies the manufacturing process by preventing short generation and eliminating the need for extra inspection steps, thereby enhancing the overall efficiency and productivity of liquid crystal display device production.
Implementation Method 1
drive a liquid crystal with a horizontal electric field that is between the pixel electrode and the common electrode
Implementation Method 2
controls light transmittance of a liquid crystal having a dielectric anisotropy using an electric field
Data Source
AI summary
A liquid crystal display device of horizontal electric field type and a fabricating method thereof is provided.The liquid crystal display device includes a plurality of gate lines. Data lines cross in such a manner to insulate with the gate lines to define a pixel area. A first short preventive hole is arranged between a (n−1)th gate line and a (n)th gate line of the plurality of gate lines. And a bifarious pixel area is arranged between the (n)th gate line and a (n+1)th gate line of the plurality of gate lines.