LCD Common Line Capacitance Compensation for Greenish Tint
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Solution Overview
Problem
Existing liquid crystal display (LCD) devices suffer from distorted common voltages, leading to greenish tint and residual images due to parasitic coupling between data and common lines, which affects picture quality.
Innovation Solution
Modifying the pattern of overlap between common and data lines to vary the common line capacitance in green sub-pixels relative to red and blue sub-pixels, and adjusting the gate line capacitance to compensate for these changes, ensuring uniform effective common voltage across all sub-pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the common line and data line are arranged in a conventional overlapping pattern, then the device structure is simple and easy to manufacture, but parasitic coupling occurs between the lines causing distorted common voltage, greenish tint, and residual images
Solution Approach 1:
The patent applies local quality by creating asymmetric overlap patterns specifically in green sub-pixel regions. The common line extends into the green sub-pixel area while being recessed in red and blue sub-pixel areas, locally modifying the capacitance distribution to compensate for the parasitic coupling effect that occurs in conventional uniform overlapping structures.
Solution Approach 2:
The patent employs asymmetry by designing different overlap configurations for different color sub-pixels. The common line has extended portions in green sub-pixels and recessed portions in red and blue sub-pixels, creating an asymmetric structure that deliberately unbalances the capacitance values to achieve voltage compensation across all sub-pixels.
2Object-affected harmful factors
If the common line capacitance is increased in green sub-pixels to compensate for parasitic coupling, then distorted common voltage is offset and greenish tint is eliminated, but the device structure becomes more complex
Solution Approach 1:
The patent implements local quality by applying capacitance compensation only where needed - specifically in green sub-pixel regions where parasitic coupling causes the most significant distortion. The common line structure is locally modified with extensions and recesses targeted at specific color sub-pixels rather than applying a uniform structure across all pixels.
Solution Approach 2:
The patent changes physical parameters of the common line structure - specifically the overlap area and capacitance values - to compensate for parasitic coupling. By adjusting the capacitance parameter in green sub-pixels (increasing it) and reducing it in red and blue sub-pixels, the patent achieves uniform effective common voltage across all sub-pixels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates greenish tint and residual images by offsetting distorted common voltages, thereby improving picture quality and preventing flicker.
Implementation Method 1
a common line capacitance (Cdc) control portion, wherein the common line capacitance (Cdc) control portion has a first capacitance value in a green sub-pixel region and a second capacitance value in red and blue sub-pixel regions
Implementation Method 2
a gate line capacitance (Cdg) control portion, wherein the gate line capacitance (Cdg) control portion has a third capacitance value in the green sub-pixel region and a fourth capacitance value in red and blue sub-pixel regions
Implementation Method 3
a fringe field occurs between the counter electrode 24 and the pixel electrode 17 when voltage is applied to the electrodes. In particular, the signal Vcom is transmitted to the counter electrode 24 and a pixel voltage passing through the TFT is transmitted to the pixel electrode 17
Data Source
AI summary
A liquid crystal display (LCD) device includes a first substrate, gate lines formed on the first substrate, data lines perpendicularly crossing the gate lines to define red, green, and blue (R/G/B) sub-pixels, thin film transistors (TFTs) disposed at each intersection where the gate lines cross the data lines, common lines disposed in parallel with the gate lines, the common lines including a common line capacitance (Cdc) control portion, pixel electrodes insulated from the common lines and connected to the TFTs, a second substrate opposite to the first substrate and bonded to the first substrate, and a liquid crystal layer disposed between the first and second substrates.