Liquid Crystal Display Common Voltage Line Placement
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Solution Overview
Problem
Liquid crystal displays face challenges in maintaining high transmittance and aperture ratio while minimizing signal delay and side visibility, particularly as pixel size decreases and common voltage lines interfere with the display area.
Innovation Solution
The implementation of common voltage lines outside the display area, overlapping with dummy pixels, reduces signal delay and maintains high transmittance by avoiding the display area, thus preserving the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If common voltage lines are disposed in the display area to reduce signal delay, then signal transmission speed is improved, but aperture ratio and transmittance deteriorate due to line interference
Solution Approach 1:
The patent relocates common voltage lines from the display area to the non-display area, changing their spatial dimension and position. This allows the lines to be positioned outside the pixel matrix, extending in the row direction beyond the display boundaries, thereby avoiding interference with the aperture ratio while maintaining signal transmission functionality
Solution Approach 2:
Dummy pixels are introduced as intermediary structures in the non-display area. These dummy pixels serve as carriers for the common voltage lines, allowing the lines to be embedded within a pixel-like structure that does not affect the actual display area, thus mediating between the need for voltage line placement and the requirement to preserve aperture ratio
2Area of stationary object
If common voltage lines are placed outside the display area to preserve aperture ratio, then transmittance is improved, but signal delay increases
Solution Approach 1:
The common voltage lines are extended in advance beyond the display area boundaries, with portions extending into the non-display area. This preliminary extension allows the lines to maintain optimal length and positioning for signal transmission while staying outside the active display region, thus preventing both signal delay and aperture ratio degradation
Solution Approach 2:
The patent utilizes the non-display area as an additional spatial dimension for routing common voltage lines. By extending lines in the row direction beyond the pixel matrix boundaries, the design creates a separate transmission path that does not compete with the display area for space, thereby maintaining both fast signal transmission and high aperture ratio
3Speed
If more common voltage lines are added to reduce signal delay, then signal transmission is improved, but device complexity increases
Solution Approach 1:
The patent merges the common voltage lines with the dummy pixel structure in the non-display area. By integrating the voltage lines into the existing dummy pixel layout, the design avoids adding separate independent line structures, thus reducing overall device complexity while still achieving improved signal transmission through optimized line placement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces signal delay and maintains high transmittance without compromising the aperture ratio, enhancing the viewing angle and display quality of liquid crystal displays.
Implementation Method 1
a liquid crystal layer in a display panel, and a voltage is applied to an electrode of the display panel to rearrange liquid crystal molecules of the liquid crystal layer and adjust an amount of light transmitted therethrough
Implementation Method 2
a first common voltage line outside the matrix of display pixels and extending in the row direction
Data Source
AI summary
A liquid crystal display includes a first substrate, a gate line and a data line on the first substrate, a plurality of display pixels arranged in a row direction and a column direction of a matrix, on the first substrate, each display pixel including a pixel electrode and a common electrode on the first substrate and overlapping each other, and an insulating film between the pixel and common electrodes, a plurality of non-display dummy pixels at an edge of the matrix of display pixels; and a first common voltage line outside the matrix of display pixels and extending in the row direction.