LCD Common Voltage Line Segmentation for Static Suppression
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Solution Overview
Problem
Conventional liquid crystal display (LCD) manufacturing methods using PMOS transistors face challenges with static electricity generation, leading to bad pixels and inefficiencies due to non-uniform charge distribution and increased mask usage.
Innovation Solution
The proposed solution involves a liquid crystal display panel design with a common voltage line structure featuring separate lines connected by connectors to minimize voltage drop and suppress static electricity, along with an ion doping method that scans ion beams in specific directions to prevent current leakage and bad pixels, all while reducing the number of masks used in the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a common voltage line is used in LCD manufacturing with PMOS transistors, then voltage distribution is maintained, but static electricity accumulates causing bad pixels
Solution Approach 1:
The common voltage line is divided into multiple separate lines instead of using a single continuous line. This segmentation prevents static electricity accumulation by creating isolated conduction paths, thereby reducing bad pixels while maintaining voltage distribution across the substrate.
2Reliability
If ion doping is performed to improve transistor performance, then device characteristics improve, but current leakage occurs causing bad pixels
Solution Approach 1:
The ion doping process applies different doping concentrations and types to specific regions: heavily doped source/drain regions for low resistance, lightly doped LDD regions for field effect control, and offset regions for leakage prevention. This local differentiation improves transistor performance while preventing current leakage-induced bad pixels.
3Manufacturing precision
If multiple masks are used in the manufacturing process to achieve precise patterning, then manufacturing precision improves, but process complexity and time increase
Solution Approach 1:
Multiple patterning steps that previously required separate masks are merged into a single mask process. The mask pattern is designed to simultaneously define gate lines, common voltage lines, and other features, reducing the total number of masks while maintaining manufacturing precision through optimized pattern layout.
Solution Approach 2:
The mask pattern serves multiple functions by simultaneously defining different feature types (gate lines, common voltage lines, active regions) in a single exposure step. This multi-functional mask design reduces process complexity and manufacturing time while maintaining the required patterning accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces static electricity-related issues, enhances manufacturing efficiency, and improves substrate utilization by minimizing bad pixels and reducing the number of masks required, thereby improving the overall process efficiency and pixel quality.
Implementation Method 1
doping ions in the first direction
Data Source
AI summary
Embodiments relate to a liquid crystal display panel and a manufacturing method thereof. The liquid crystal display panel includes a first substrate; a second substrate facing the first substrate; a liquid crystal layer between the first substrate and the second substrate; a gate line extended in a first direction on the first substrate; a data line on the first substrate and extended in a second direction, crossing the first direction; and a common voltage line on the same layer as the gate line. The common voltage line includes: a plurality of first lines and a plurality of second lines extended in the first direction and separately disposed with a cutting unit therebetween; a first connector for connecting the first lines; and a second connector for connecting the second lines.