LCD Data Line Reduction via Compensation Electrodes
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Solution Overview
Problem
High manufacturing costs and potential mis-operation due to densely arranged data lines in liquid crystal display (LCD) devices, which also lead to parasitic capacitance issues affecting picture quality.
Innovation Solution
The implementation of a design where data lines are reduced by half by dividing pixels into two groups, with compensation electrodes overlapped with pixel electrodes adjacent to gate lines on an insulation film to minimize parasitic capacitance without reducing the aperture ratio, and common lines are used to form storage capacitors, reducing manufacturing costs and ensuring uniform kickback voltage across pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of data lines is increased to support higher definition LCD devices, then the display resolution is improved, but the manufacturing cost increases and the density of data lines causes mis-operation
Solution Approach 1:
The patent merges the function of two data lines into one by having a single data line serve two pixels alternately. The data driver outputs data signals for two pixels sequentially, and the pixel electrodes maintain the signals using storage capacitors. This combining approach reduces the number of data lines by half while maintaining high definition display capability, thereby lowering manufacturing costs.
2Measurement precision
If the number of data lines is increased to support higher definition LCD devices, then the display resolution is improved, but the density of data lines increases causing mis-operation
Solution Approach 1:
The patent merges the function of two data lines into one by having a single data line serve two pixels alternately. The data driver outputs data signals for two pixels sequentially, and the pixel electrodes maintain the signals using storage capacitors. This combining approach reduces the number of data lines by half while maintaining high definition display capability, thereby lowering manufacturing costs.
3Measurement precision
If compensation electrodes are added to reduce parasitic capacitance, then picture quality is improved, but device complexity increases
Solution Approach 1:
The patent introduces compensation electrodes as intermediary elements positioned between the gate lines and pixel electrodes. These compensation electrodes are connected to the gate lines and overlap with the pixel electrodes in the insulating film region. By acting as mediators, they control and reduce the parasitic capacitance between gate lines and pixel electrodes, thereby improving picture quality while maintaining a relatively simple structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces manufacturing costs by halving the number of data lines, maintains uniform kickback voltage, and prevents picture quality deterioration by minimizing parasitic capacitance, thereby enhancing the overall performance of LCD devices.
Implementation Method 1
compensation electrodes each overlapped with the pixel electrodes adjacent to the respective gate lines in the center of an insulation film, to reduce parasitic capacitances between the pixel electrodes and the gate lines
Data Source
AI summary
A LCD device adapted to reduce data lines and prevent the deterioration of picture quality characteristics. The LCD device includes: a substrate defined into a plurality of pixels; a plurality of data lines arranged in a first direction on the substrate to divide the pixels in twos; a plurality of gate lines arranged on the substrate in a second direction crossing the first direction; thin film transistors each disposed on the pixels to be electrically connected to the respective gate lines and data lines; pixel electrodes each disposed on the pixels, to be electrically connected to the respective thin film transistors; and compensation electrodes each overlapped with the pixel electrodes adjacent to the respective gate lines in the center of an insulation film, to reduce parasitic capacitances between the pixel electrodes and the gate lines.