Liquid Crystal Display Drive Circuit Timer Switch
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Solution Overview
Problem
Large-sized liquid crystal display devices face challenges with increased complexity in wire layout and difficulty in accurately controlling pixel electrodes due to wiring delays and parasitic capacitors, leading to extended response times and abnormal liquid crystal molecule rotation, affecting transmittance and contrast.
Innovation Solution
A liquid crystal display drive circuit incorporating a timer switch that serially connects to the gate terminal of a thin-film transistor to early cut off the gate signal and utilize parasitic capacitor discharging, reducing the influence of discharging voltage on conduction time and improving transistor control accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the size of the liquid crystal display is increased, then the display screen becomes larger, but the wire layout becomes more complicated and control accuracy deteriorates due to wiring delay and parasitic capacitors
Solution Approach 1:
The gate terminal connection is segmented into two distinct phases: a first connection period where the gate terminal is connected to the gate line for voltage application, and a second connection period where the gate terminal is disconnected from the gate line to allow parasitic capacitor discharge. This segmentation resolves the contradiction by separating the voltage application function from the discharge function, preventing the parasitic capacitor from causing extended conduction that would degrade control accuracy in large displays.
Solution Approach 2:
The circuit performs preliminary discharge action by automatically disconnecting the gate terminal from the gate line after voltage application, allowing the parasitic capacitor to discharge before the next switching cycle. This preliminary discharge prevents the accumulation of residual voltage that would otherwise cause abnormal conduction and control inaccuracies in large-sized displays with long wiring paths.
2Quantity of substance
If the number of pixel electrodes is increased, then the display resolution improves, but wiring delay increases causing extended response time and abnormal liquid crystal molecule rotation
Solution Approach 1:
The gate signal waveform is segmented into distinct time periods: a high-level voltage application period followed by a discharge period where the gate terminal is disconnected. This segmentation ensures that even with increased numbers of pixel electrodes and longer wiring, each pixel's response time is controlled by the segmented timing rather than being extended by parasitic capacitor discharge, thus maintaining fast response across high-resolution displays.
3Length of stationary object
If the gate line length is increased, then more pixel rows can be controlled, but time delay in the drive circuit increases causing abnormal transistor conduction
Solution Approach 1:
The circuit implements preliminary disconnection action by automatically disconnecting the gate terminal from the gate line after the high-level voltage period, allowing the parasitic capacitor to discharge before the next switching operation. This preliminary action prevents the time delay caused by long gate lines from resulting in abnormal conduction, thereby maintaining reliable transistor control even in displays with many rows controlled by long gate lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the impact of parasitic capacitors on conduction time, preventing abnormal transistor conduction and improving the quality of large-sized liquid crystal displays by enhancing control accuracy and eliminating transmittance variations and contrast abnormalities.
Implementation Method 1
utilize parasitic capacitor discharging, reducing the influence of discharging voltage on conduction time
Data Source
AI summary
The present invention provides a liquid crystal device drive circuit, which includes a gate driver, a source driver, a plurality of gate lines, and a plurality of data lines. The gate lines and data lines define a plurality of pixel units. Each pixel unit includes a thin-film transistor, a common electrode, a pixel electrode electrically connected to the thin-film transistor, a storage capacitor, and a timer switch. The pixel electrode is electrically connected to the thin-film transistor. The common electrode and the pixel electrode constitute a liquid crystal capacitor. The storage capacitor is connected in parallel to the liquid crystal capacitor. The thin-film transistor includes a gate terminal and a source terminal. The gate terminal is electrically connected to the gate line via the timer switch. The thin-film transistor is electrically connected to the gate driver and the source driver respectively by the gate lines and the data lines.


