LCD Driver Semiconductor Chip Layout for Size Reduction

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Solution Overview

Problem

The miniaturization of semiconductor elements has made it challenging to reduce the size of semiconductor chips used in LCD drivers, particularly due to the fixed number and arrangement of output bump electrodes, which limits the reduction of the chip's long side length.

Innovation Solution

The semiconductor chip is designed with a layout configuration where input and output bump electrodes are arranged differently along the long sides, and electrostatic protection circuits are strategically positioned to overlap or not overlap with the bump electrodes, allowing for a more compact layout by reducing the area occupied by protection circuits and optimizing the placement of internal circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of output bump electrodes is increased to maintain LCD driver functionality, then the reliability is improved, but the length of the semiconductor chip in the long-side direction increases

Engineering Contradiction:
ImproveLCD driver functionalityVSAvoidchip length in long-side direction
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent transitions the arrangement of bump electrodes from a one-dimensional linear arrangement along the long side to a two-dimensional arrangement that utilizes both the long side and short side of the chip. Specifically, bump electrodes are arranged along both long sides of the semiconductor chip, with some positioned closer to the first long side and others closer to the second long side, effectively using the short-side direction to reduce the required length in the long-side direction while maintaining the required number of bump electrodes for LCD driver functionality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If electrostatic protection circuits are arranged to overlap with bump electrodes, then the area occupied by protection circuits is reduced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvearea occupied by protection circuitsVSAvoidalignment precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies different arrangement strategies for different groups of electrostatic protection circuits based on their local requirements. Some electrostatic protection circuits are arranged to overlap with bump electrodes in the planar view to minimize area, while others are arranged at different positions to balance manufacturing feasibility. This selective application of overlapping arrangement resolves the contradiction between area reduction and manufacturing precision requirements

Inventive Principle:
Principle #3Local quality

3Area of stationary object

If the distance between bump electrodes is reduced to minimize chip size, then the area of the semiconductor chip is reduced, but the reliability of electrical connections deteriorates

Engineering Contradiction:
Improvechip areaVSAvoidelectrical connection reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By utilizing the short-side direction for bump electrode arrangement, the patent reduces the required spacing between bump electrodes along any single direction while maintaining adequate overall separation. The two-dimensional arrangement allows bump electrodes to be positioned closer together in terms of chip area occupation while preserving sufficient electrical isolation and connection reliability through strategic positioning along both long sides of the chip

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10461053B2Semiconductor device
Publication Date: 2019.10.29 RENESAS ELECTRONICS CORP
  • US10461053B2 patent drawing
  • US10461053B2 patent drawing
  • US10461053B2 patent drawing

AI summary

To provide a technique capable of reducing the chip size of a semiconductor chip and particularly, a technique capable of reducing the chip size of a semiconductor chip in the form of a rectangle that constitutes an LCD driver by devising a layout arrangement in a short-side direction. In a semiconductor chip that constitutes an LCD driver, input protection circuits are arranged in a lower layer of part of a plurality of input bump electrodes and on the other hand, in a lower layer of the other part of the input bump electrodes, the input protection circuits are not arranged but SRAMs (internal circuits) are arranged.