LCD Driver Chip Protective Elements Layout
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Solution Overview
Problem
The challenge is to reduce the size of LCD driver chips while maintaining the necessary protective elements to prevent electrostatic breakdown, as the number of outputs increases, which requires a balance between reducing chip size and ensuring electrostatic withstand voltage without increasing the chip size.
Innovation Solution
The solution involves arranging pairs or multiples of protective elements, such as pn junction diodes, in a specific layout on the semiconductor chip to efficiently protect the driver output circuit from electrostatic breakdown, allowing for a reduction in chip size by narrowing the pitch between pads and reducing the size of the protective element areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of outputs of the driver output circuit is increased, then the functionality and definition of the LCD driver is improved, but the chip size increases due to the need for more pads and protective elements
Solution Approach 1:
The patent combines multiple protective elements (first and second protective elements) into a single integrated structure that serves both electrostatic protection functions simultaneously. This merging allows the chip to maintain enhanced protection capabilities while reducing the total area occupied compared to using separate protective elements for each output.
Solution Approach 2:
The patent utilizes the vertical dimension by forming the first and second protective elements at different depths within the semiconductor substrate (first protective element in first region, second protective element in second region). This three-dimensional arrangement allows multiple protective functions to coexist in a compact footprint, effectively increasing the number of outputs without proportionally increasing chip area.
2Reliability
If protective elements are added between pads and driver output circuit, then electrostatic protection is improved, but the chip size increases due to additional area required for protective element areas
Solution Approach 1:
The patent nests the first and second protective elements within the semiconductor substrate structure, where each protective element is formed in a distinct region but both are contained within the overall chip architecture. This nesting approach allows electrostatic protection to be integrated without adding significant external area, as the protective elements are embedded within the existing substrate volume.
Solution Approach 2:
By forming protective elements at different vertical levels and positions within the semiconductor substrate, the patent utilizes the third dimension (depth) to accommodate multiple protective structures. This vertical integration reduces the horizontal area required for protective elements, thereby maintaining electrostatic protection while minimizing chip size increase.
3Area of stationary object
If the pitch between pads is narrowed to reduce chip size, then the area occupied by pads is reduced, but the manufacturing precision and bonding strength requirements become more stringent
Solution Approach 1:
The patent applies different structural characteristics to different regions of the chip: the first protective element is formed in a first region with specific dimensional characteristics, while the second protective element is formed in a second region with different dimensional characteristics. This local differentiation allows optimization of each protective element for its specific function while maintaining overall compact dimensions, thereby reducing chip size without compromising bonding precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the chip size of the LCD driver while maintaining the necessary protective elements, enabling the increase in screen size and number of outputs without compromising electrostatic protection, thus allowing for more efficient use of space and potentially increasing the number of chips produced.
Implementation Method 1
provides a protective element between the connection of a pad and a semiconductor circuit (for example, a driver output circuit) in order to prevent an electrostatic breakdown in the semiconductor circuit in an LCD driver
Implementation Method 2
a first protective element comprising a first p-type semiconductor region and a first n-type semiconductor region formed in the first p-type semiconductor region, and a second protective element comprising a second n-type semiconductor region and a second p-type semiconductor region formed in the second n-type semiconductor region
Data Source
AI summary
An output side of a driver output circuit of an LCD driver includes a first protective element having an n-type semiconductor region and a p-type semiconductor region formed in the n-type semiconductor region, and a second protective element having a p-type semiconductor region and an n-type semiconductor region formed in the p-type semiconductor region. The first and second protective elements are arranged in twos, respectively, adjacent to each other.