LCD Driver DAC Sharing With Sample-and-Hold to Cut Chip Area
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Solution Overview
Problem
Conventional liquid crystal display (LCD) drivers require a large chip area due to the use of numerous digital-to-analog converters (DACs), which expands significantly with increased bit-resolution, leading to inefficient use of space and increased area consumption.
Innovation Solution
The proposed integrated circuit design uses only three types of DACs (N-channel and P-channel) coupled with sample and hold circuits, reducing the number of DACs needed and utilizing a reference voltage generator to achieve high resolution with reduced chip area, allowing for efficient signal conversion and output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional LCD drivers use numerous digital-to-analog converters (DACs) for each channel to achieve high resolution, then the signal conversion precision is improved, but the chip area increases significantly
Solution Approach 1:
The patent merges multiple DAC channels into a single shared DAC by time-division multiplexing. The DAC is shared among multiple channels through sequential operation controlled by a shift register, eliminating the need for separate DACs per channel while maintaining signal conversion precision through proper timing and sampling.
Solution Approach 2:
The patent introduces dynamic time-division multiplexing where the DAC operates dynamically across different time slots for different channels. The system dynamically switches between channels using control signals and sample-and-hold circuits, allowing one DAC to serve multiple functions that would traditionally require multiple static DACs.
2Measurement precision
If the bit-resolution of DACs is increased to achieve higher display resolution, then the signal precision is improved, but the chip area expands abnormally
Solution Approach 1:
The patent combines multiple high-resolution DAC channels into a single shared DAC resource. By time-division multiplexing, the system achieves the functionality of multiple high-bit-resolution DACs using one physical DAC, preventing the exponential area expansion that would occur with multiple independent high-resolution DACs.
Solution Approach 2:
The patent uses sample-and-hold circuits to capture and hold input signals before DAC conversion. This preliminary sampling action allows the system to prepare data in advance, enabling the shared DAC to process high-resolution data sequentially without loss of precision while minimizing the need for multiple simultaneous high-resolution converters.
Data Source
AI summary
An integrated circuit includes a digital-to-analog converter (DAC) circuit including at least one first channel type DAC and at least one second channel type DAC. The integrated circuit includes a plurality of sample and hold (S/H) circuits. Each of the S/H circuits is coupled with the DAC circuit. The S/H circuits are capable of receiving signals from the DAC circuit and outputting the signals in parallel.


