LCD Data Driver Output Circuit for Gate Voltage Stabilization
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Solution Overview
Problem
Existing output circuits for liquid crystal display devices face challenges in high-speed driving of heavy capacitive loads, leading to output signal delays due to deviations in gate voltages of transistors, which degrade display quality, and require additional bias lines that increase the risk of noise interference.
Innovation Solution
The proposed output circuit includes a differential amplifier circuit with current mirrors and floating current source circuits, along with a control circuit that uses bias voltages to prevent transistor gate voltages from deviating from the middle power supply range, reducing signal delays and the number of bias lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the output circuit drives heavy capacitive loads at high speeds, then the driving capability is improved, but the gate voltages of transistors deviate from the middle power supply range causing output signal delays
Solution Approach 1:
The control circuit performs preliminary action by detecting gate voltage deviations before they cause significant output signal delays. When the gate voltage of the transistor in the output stage deviates from the middle power supply range, the control circuit activates compensation mechanisms (such as adjusting bias voltages or gate voltages) to prevent the deviation from escalating, thereby maintaining high-speed driving capability while avoiding output signal delays.
Solution Approach 2:
The control circuit implements feedback by continuously monitoring the gate voltages of transistors in the output stage and adjusting operating parameters accordingly. When the gate voltage deviates from the middle power supply range during high-speed driving of heavy capacitive loads, the feedback mechanism triggers corrective actions to bring the gate voltage back within the acceptable range, thus preventing output signal delays while maintaining driving capability.
2Stability of the object's composition
If additional bias lines are added to control transistor gate voltages, then the stability of amplifier operations is improved, but the number of bias lines increases leading to higher risk of noise interference
Solution Approach 1:
The control circuit merges multiple control functions into a unified structure that can manage transistor gate voltages without requiring separate bias lines for each transistor. By combining control signals and using shared biasing mechanisms, the circuit achieves stable amplifier operations while minimizing the number of bias lines, thereby reducing the risk of noise interference.
Solution Approach 2:
The control circuit is designed with multi-functionality, serving both to stabilize amplifier operations and to minimize bias line requirements. By creating a universal control mechanism that can adjust multiple transistor gate voltages through fewer bias lines, the invention achieves operational stability while reducing the harmful effects of noise interference associated with numerous bias lines.
Data Source
AI summary
A differential amplifier circuit includes a differential input stage, a first current mirror, a second current mirror, a first current source circuit, and a second current source circuit. The first current source circuit has a first transistor of a first conductivity type with a control terminal supplied with a first bias voltage, and a second transistor of a second conductivity type with a control terminal supplied with a second bias voltage. An output amplifier circuit includes a third transistor of the first conductivity type and a fourth transistor of the second conductivity type. A control circuit has a fifth transistor of the first conductivity type with a first terminal connected to a connection point between the other end of the second current source circuit and the control terminal of the fourth transistor in the output amplifier circuit, with a second terminal connected to an output node of the second current mirror, and with a control terminal receiving the first bias voltage.