LCD Driving Circuit Segmentation for Signal Delay Reduction
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Solution Overview
Problem
Conventional liquid crystal display apparatuses suffer from low display quality due to signal delay on primary scanning lines, affecting image clarity and brightness uniformity.
Innovation Solution
A driving circuit is designed with separate clock-signal driving circuits for primary and secondary scanning lines, where the frequency of the second clock signal is higher than the first, allowing independent control of scanning signals to prevent signal delay and ensure even brightness levels between primary and secondary pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single clock signal is used to drive both primary and secondary scanning lines, then the device complexity is reduced, but signal delay occurs affecting display quality
Solution Approach 1:
The patent divides the single clock signal into two separate clock signals (first clock signal and second clock signal) that are transmitted through different scanning lines (primary and secondary scanning lines). This segmentation allows independent control of signal transmission timing for each pixel type, eliminating signal delay and ensuring synchronized display without compromising overall system complexity.
2Device complexity
If primary and secondary pixels share the same scanning line, then the device structure is simplified, but brightness uniformity deteriorates
Solution Approach 1:
The patent segments the scanning lines into primary scanning lines and secondary scanning lines, with each type dedicated to specific pixels. Primary scanning lines drive primary pixels while secondary scanning lines drive secondary pixels, ensuring that each pixel type receives precisely controlled signals for uniform brightness display without interference from shared line resistance variations.
Solution Approach 2:
The patent applies different scanning line configurations to different regions/pixel types within the display panel. Primary pixels connected to primary scanning lines and secondary pixels connected to secondary scanning lines receive optimized local signal transmission paths, ensuring each pixel type achieves its required brightness characteristics without compromising overall display uniformity.
3Device complexity
If the same clock signal frequency is used for both scanning lines, then the circuit design is simplified, but signal delay affects display quality
Solution Approach 1:
The patent segments the clock signal frequency control into independent first and second clock signals with potentially different frequencies. This allows optimization of signal transmission timing for each scanning line type (primary and secondary) independently, ensuring that each pixel type is driven at the optimal frequency for its specific electrical characteristics, thereby eliminating signal delay without complicating the overall frequency control mechanism.
Data Source
AI summary
A driving circuit and a liquid crystal display apparatus having the same are disclosed. The driving circuit includes a first clock-signal driving circuit, a second clock-signal driving circuit, a data-line driving circuit, and a scanning-line driving circuit. The driving circuit and the liquid crystal display apparatus having the same prevent the delay of primary scanning signals so as to solve a technical problem where conventional liquid crystal display apparatus display images with a low display quality due to the delay of primary scanning signals.