LCD Driving Circuit Reducing Data Lines via Time-Division Multiplexing

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Solution Overview

Problem

The increasing number of pixels in high-resolution LCD devices leads to a higher number of gate and data lines, resulting in increased costs due to the higher number of data-driving integrated circuits required.

Innovation Solution

A flat panel display device and method where adjacent pixel cells are driven by a single data line, utilizing a timing controller to generate control and clock signals, and a gate-driving circuit to supply overlapped scan pulses, reducing the number of data lines and integrated circuits needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of pixels is increased to achieve high resolution, then the display quality is improved, but the number of data lines and data-driving integrated circuits increases, leading to higher cost

Engineering Contradiction:
Improvedisplay resolutionVSAvoidnumber of data lines and integrated circuits
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines the driving functions for multiple data lines into a single integrated circuit. Specifically, one data-driving integrated circuit drives multiple data lines (e.g., 8 data lines) by time-division multiplexing, where the circuit sequentially connects to different data lines based on control signals. This merging approach maintains the required display resolution while significantly reducing the number of separate integrated circuits needed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The data-driving integrated circuit is designed with multi-functionality to serve multiple data lines simultaneously. The circuit includes multiple data driving units that can be selectively activated, allowing a single universal circuit to perform the driving function for 8 different data lines. This universal design reduces the overall component count and system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If the number of data lines is reduced to lower cost, then the device complexity is decreased, but the driving capability for multiple pixels may be compromised

Engineering Contradiction:
Improvenumber of data lines and integrated circuitsVSAvoiddata driving capability
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements periodic action through time-division multiplexing, where the data-driving integrated circuit sequentially activates different data driving units in periodic cycles. Each cycle serves a specific data line, and the circuit transitions through multiple cycles to serve all 8 data lines. This periodic operation allows a single circuit to maintain the driving capability of multiple data lines without requiring separate dedicated circuits for each.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The data-driving integrated circuit employs dynamic switching mechanisms to connect to different data lines based on control signals. The circuit dynamically reconfigures its internal connections and activates appropriate data driving units according to the scanning sequence, enabling flexible and adaptive driving of multiple data lines. This dynamic capability ensures that the reduced number of circuits does not compromise the overall driving performance.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8188963B2Driving circuit for liquid crystal display device and method of driving the same
Publication Date: 2012.05.29 LG ELECTRONICS INC
  • US8188963B2 patent drawing
  • US8188963B2 patent drawing
  • US8188963B2 patent drawing

AI summary

A flat panel display device and a method of driving the same are disclosed, to cut down the cost of driving circuit by decreasing the number of data lines, wherein the flat panel display device comprises a plurality of gate and data lines which are formed on a substrate; an image displaying unit which includes a plurality of pixel cells of which two pixel cells adjacently positioned along the direction of gate line are driven by one data line; a timing controller which aligns source data provided from the external, and generates a control signal and a clock signal; a plurality of data-driving integrated circuits which convert the source data into analog video signals on the basis of the control signal and supply the analog video signals to the data line, and raise and output the clock signal; and a gate-driving circuit which generates scan signals overlapped by each unit corresponding to the half of one horizontal period according to the raised clock signal, and supplies the overlapped scan pulses to the gate lines in sequence.