Liquid Crystal Display Driving Method for Image Sticking Suppression
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Solution Overview
Problem
Liquid crystal display apparatuses with a three-TFT structure experience image sticking due to the slow discharge of charge from the second liquid crystal capacitor, leading to DC voltage persistence after power is turned off, especially with high off-resistance oxide semiconductor TFTs, and existing solutions increase power consumption or risk damage to the gate driver.
Innovation Solution
A liquid crystal display apparatus and driving method that includes a gate drive circuit, source drive circuit, and control circuit to manage the application of gate and buffer capacitor scanning signals, allowing sequential selection of pixel rows and overlap of pulses to quickly discharge pixels without increasing power consumption, using a hold capacitor to maintain voltage during power drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If a three-TFT structure with buffer capacitor is used to create dark pixels, then gray scale display characteristics at oblique viewing angles are improved, but image sticking occurs when power is turned off due to slow charge discharge
Solution Approach 1:
The patent applies preliminary action by turning on the third TFT to connect the buffer capacitor to the second pixel electrode before the main power is completely turned off. This proactive connection initiates the charge discharge process from the second liquid crystal capacitor through the buffer capacitor, preventing image sticking by ensuring the discharge begins in advance while the display is still operational.
2Reliability
If simultaneous selection of multiple gate bus lines is used to quickly discharge pixels, then image sticking is reduced, but power consumption increases and gate driver may be damaged
Solution Approach 1:
The patent applies segmentation by dividing the pixel array into multiple pixel rows, each associated with separate gate bus lines and buffer capacitor scanning lines. Instead of simultaneously discharging all pixels, the system sequentially processes different pixel rows at different times, allowing the third TFT to be turned on for specific rows during their respective scanning periods. This segmented approach reduces peak power consumption and prevents gate driver damage while still effectively suppressing image sticking across the entire display.
3Use of energy by moving object
If sequential application of gate-on pulse and buffer capacitor scanning signal is used, then power consumption is reduced, but discharge time increases causing image sticking
Solution Approach 1:
The patent applies preliminary action by turning on the third TFT to connect the buffer capacitor to the second pixel electrode before the main power is completely turned off. This proactive connection initiates the charge discharge process from the second liquid crystal capacitor through the buffer capacitor, preventing image sticking by ensuring the discharge begins in advance while the display is still operational.
4Reliability
If oxide semiconductor TFT with high off-resistance is used, then pixel leakage is reduced, but charge discharge from liquid crystal capacitor becomes slower causing image sticking
Solution Approach 1:
The patent applies the intermediary principle by introducing the buffer capacitor as a mediator between the second liquid crystal capacitor and the second pixel electrode. The buffer capacitor provides an alternative discharge path that does not depend on the high off-resistance of the oxide semiconductor TFT. By connecting the buffer capacitor to the second pixel electrode through the third TFT, the system enables faster charge transfer and discharge, effectively bypassing the speed limitation imposed by the high off-resistance特性 of oxide semiconductor TFTs while maintaining low pixel leakage.
Data Source
AI summary
A liquid crystal display apparatus switches modes from a normal display mode to a stop preparation mode when a main power source voltage drops. In the display mode, a gate drive circuit sequentially applies a first gate-on pulse to gate bus lines so as to select pixel rows sequentially, and applies a second gate-on pulse to buffer capacitor scanning lines, each of which is associated with a pixel row selected by the first gate-on pulse, during a period that does not overlap a period during which the first gate-on pulse is applied, and a source drive circuit applies a display signal voltage to source bus lines. In the stop preparation mode, the gate drive circuit sequentially applies the first gate-on pulse to the gate bus lines so as to select the pixel rows sequentially, and applies the second gate-on pulse to the buffer capacitor scanning lines, each of which is associated with the pixel row selected by the first gate-on pulse, during a period that at least partially overlaps a period during which the first gate-on pulse is applied, and the source drive circuit applies 0 V to the source bus lines.


