Liquid Crystal Display Driving Method for DC Image Stain Prevention
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Solution Overview
Problem
Active matrix liquid crystal displays suffer from DC image sticking and stains due to the accumulation of impurity ions when a DC voltage of the same polarity is applied for a long time, leading to degraded alignment characteristics and non-uniform stain issues across panels.
Innovation Solution
A liquid crystal display system that includes a data drive circuit generating pre-charge and real-charge voltages with opposite or same polarities, and a gate drive circuit supplying synchronized gate pulses in alternating directions, controlled by a timing controller that inverts the logic state of the up/down signal, ensuring each liquid crystal cell is charged with alternating polarities to prevent DC drive accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a DC voltage of the same polarity is applied to the liquid crystal layer for a long time, then the liquid crystal display can maintain stable operation, but impurity ions accumulate and cause stains and degraded alignment characteristics
Solution Approach 1:
The patent applies periodic action by alternating the polarity of the data voltage between positive and negative every frame period. The timing controller inverts the logic state of the up/down signal one or more times during each frame period, causing the gate drive circuit to supply gate pulses in alternating directions. This periodic polarity reversal prevents impurity ions from accumulating on the same electrode, thereby preventing stain formation and alignment layer degradation while maintaining stable display operation.
2Object-affected harmful factors
If the polarity of data voltage is alternated to prevent ion accumulation, then stain formation is reduced, but the complexity of the driving circuit and control timing increases
Solution Approach 1:
The timing controller performs multiple functions: it controls the normal scanning operation, generates the up/down signal for gate pulse direction control, and simultaneously inverts the logic state to alternate data voltage polarity. The gate drive circuit also serves dual purposes by using the same up/down signal to control both the direction of gate pulse scanning and the polarity of applied data voltage. This multi-functionality approach prevents stain formation through polarity alternation while avoiding additional dedicated circuitry.
3Object-affected harmful factors
If gate pulses are supplied in alternating directions with precise timing control, then DC drive effects are suppressed, but the control timing and synchronization requirements become more complex
Solution Approach 1:
The timing controller uses feedback mechanisms to maintain precise timing synchronization. It receives timing signals (such as horizontal sync signals) and uses these to generate the up/down signal and control the inversion timing of the data voltage polarity. The controller ensures that the second gate pulse is supplied at intervals equal to or longer than scanning time of 1 line from the falling edge of the first gate pulse, using the timing feedback to maintain accurate synchronization between gate pulse direction changes and data voltage polarity alternation, thereby suppressing DC drive effects while managing timing complexity through established timing protocols.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces DC image sticking and stains by alternating the polarity of the data voltage charged to each liquid crystal cell, thereby suppressing the accumulation of impurity ions and improving display quality by preventing non-uniform staining across panels.
Implementation Method 1
If a DC voltage of the same polarity is applied to a liquid crystal layer for a long time, impurity ions in the liquid crystal layer are separated depending on a polarity of the liquid crystal. Further, ions with different polarities are respectively accumulated on a pixel electrode and a common electrode inside the liquid crystal cells.
Implementation Method 2
The development of a liquid crystal material with a low dielectric constant or a method for improving an alignment material or an alignment method have been attempted so as to solve the stain problem.
Data Source
AI summary
A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a liquid crystal display panel, a data drive circuit, a gate drive circuit, and a timing controller. The data drive circuit generates a pre-charge data voltage during pre-charge time and generates a real-charge voltage to be displayed on the liquid crystal display panel during real-charge time. The gate drive circuit supplies a first gate pulse synchronized with the pre-charge data voltage to the gate lines during the pre-charge time while shifting a gate pulse in a downward direction and an upward direction depending on an up/down signal, and then supplies a second gate pulse synchronized with the real-charge data voltage to the gate lines from a falling edge of the first gate pulse at intervals equal to or longer than scanning time of 1 line during the real-charge time.