Liquid Crystal Display Electrode Design for Reduced Parasitic Capacitance
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Solution Overview
Problem
Conventional liquid crystal displays face challenges in efficiently controlling liquid crystal molecules and reducing parasitic capacitance and light leakage, which affect transmittance and signal delay.
Innovation Solution
A liquid crystal display design with two field generating electrodes on the same substrate, where a pixel electrode and a common electrode are configured with branch electrodes and a specific overlap structure to minimize parasitic capacitance and light leakage, allowing for improved transmittance and reduced signal delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional liquid crystal displays use two display panels with field generating electrodes, then the basic display function is achieved, but the control of liquid crystal molecules is inefficient and transmittance is limited
Solution Approach 1:
The patent merges the field generating electrodes onto a single substrate, combining functions that were previously distributed across two separate panels. This integration improves the efficiency of liquid crystal molecule control and enhances transmittance by eliminating the limitations of the conventional dual-panel structure.
Solution Approach 2:
The patent introduces a new spatial arrangement by placing both field generating electrodes on the same substrate plane, transitioning from a vertical stacking configuration (two separate panels) to a planar integration configuration. This dimensional change enables improved electrode control over liquid crystal molecules and higher transmittance.
2Area of stationary object
If signal lines and field generating electrodes are disposed close together, then device area is reduced, but parasitic capacitance increases causing signal delay and crosstalk
Solution Approach 1:
The patent introduces an insulating layer as an intermediary between the signal lines and field generating electrodes. This intermediate structure allows the signal lines and electrodes to be disposed close together for area reduction while the insulating layer prevents direct electrical interaction, thereby minimizing parasitic capacitance and its harmful effects.
3Ease of manufacture
If field generating electrodes are configured with simple overlap structure, then manufacturing is simplified, but light leakage occurs due to electric field distortions
Solution Approach 1:
The patent segments the field generating electrodes into multiple electrode structures with specific overlapping arrangements. This segmentation allows for controlled electric field distribution that prevents field distortions at electrode edges, thereby reducing light leakage while maintaining manufacturability through standardized electrode patterns.
Solution Approach 2:
The patent applies different overlapping configurations to different regions of the electrode structure. By optimizing the local overlap geometry in specific areas, the patent controls electric field distribution to minimize field distortions and associated light leakage, while maintaining overall manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances transmittance, reduces parasitic capacitance and light leakage, and allows for a more compact display panel with reduced bezel region, while also providing greater design freedom for integrating gate driving circuits.
Implementation Method 1
voltage is applied to the field generating electrodes to form an electric field in the liquid crystal layer. In this manner, the alignment of liquid crystal molecules of the liquid crystal layer is affected by the electric field, and polarization of incident light is controlled in association therewith.
Implementation Method 2
polarization of incident light is controlled in association therewith
Implementation Method 3
the parasitic capacitance may be reduced between a signal line and a field generating electrode, which, thereby, minimizes signal delay and crosstalk between the signal line and the field generating electrode
Data Source
AI summary
A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.