LCD Panel Electrode Stacking for Transmittance
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Solution Overview
Problem
The FFS mode LCD device faces challenges in enhancing transmittance due to manufacturing limitations, such as masking tolerance and diffraction characteristics, which hinder the narrowing of pixel electrode distances, thereby limiting the operation efficiency of liquid crystal molecules.
Innovation Solution
The LCD panel design includes gate and data lines crossing each other to define a pixel region, with a thin film transistor connected to these lines, pixel electrodes in partial contact with a drain electrode, a common electrode formed in an alternating shape, and a passivation layer between the pixel and common electrodes, all formed through a single process to enhance transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the distance between pixel electrodes is reduced to enhance transmittance, then the operation efficiency of liquid crystal molecules is improved, but manufacturing precision is compromised due to masking tolerance and diffraction characteristics
Solution Approach 1:
The patent transitions from a planar two-dimensional electrode arrangement to a three-dimensional stacked configuration. The first and second pixel electrodes are positioned at different vertical levels (different layers) rather than simply adjacent horizontally, enabling reduced horizontal spacing while maintaining manufacturability within existing process capabilities
Solution Approach 2:
The patent implements a nested structure where multiple pixel electrodes are arranged in stacked layers, with each electrode positioned within or near the footprint of adjacent electrodes in other layers. This nesting approach maximizes spatial utilization and reduces the horizontal distance between electrodes without requiring excessive manufacturing precision
2Illumination intensity
If the distance between pixel electrodes and common electrodes is reduced to improve operation efficiency, then transmittance is enhanced, but device complexity increases due to additional passivation layers and manufacturing steps
Solution Approach 1:
The passivation layer is designed to serve multiple functions simultaneously: it provides electrical insulation between the pixel electrodes and common electrodes, defines the spacing between electrodes, and serves as a structural platform for electrode positioning. This multi-functionality reduces the need for additional dedicated insulation structures
Solution Approach 2:
The patent combines the insulation function and spacing function into a single integrated passivation layer structure, rather than using separate insulation layers and spacing structures. The first and second pixel electrodes are both positioned relative to the same passivation layer, merging multiple structural requirements into one element
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design increases the operation efficiency of liquid crystal molecules, leading to improved transmittance and image quality by reducing the distance between pixel electrodes and common electrodes, thus overcoming manufacturing constraints.
Implementation Method 1
The liquid crystal molecules are displaced by an electric field which is generated by a potential difference between the pixel electrode 341 and the common electrode 343
Data Source
AI summary
An LCD panel is disclosed which includes: gate and data lines formed to cross each other and define a pixel region; a thin film transistor connected to the gate and data lines; a plurality of pixel electrodes formed to be in partial contact with a drain electrode of the thin film transistor; a common electrode formed in a shape alternating with the pixel electrodes; and a passivation layer formed between the pixel electrodes and the common electrode, wherein the pixel electrodes and the common electrode are formed through a single process.


