LCD Fan-Out Trace Compensation for Uniform Display Brightness
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Solution Overview
Problem
Existing LCD technologies face challenges in balancing the impedance differences of fan-out traces due to varying lengths and resistances, which affect display uniformity and are costly to address with current solutions like PPCC functions in driver chips.
Innovation Solution
A driving circuit with compensation circuits that adjust resistance and capacitance values dynamically based on gray scale and scanning time to balance impedance, using a compensation level selection circuit and gating circuit to optimize fan-out trace compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fan-out traces are made equal in length or impedance by winding, then impedance balance is improved, but screen ratio and narrow-bezel realization are restricted
Solution Approach 1:
The patent introduces compensation circuits at specific locations where fan-out traces connect to data lines, providing localized impedance compensation rather than requiring global trace length equalization. This allows different trace lengths to be compensated locally, maintaining screen ratio while achieving impedance balance.
Solution Approach 2:
The compensation circuits dynamically adjust resistance and capacitance parameters to compensate for impedance differences in fan-out traces. By changing these electrical parameters, the system achieves impedance balance without modifying the physical trace geometry, thus preserving screen ratio.
2Manufacturing precision
If PPCC function is added in driver chip, then fan-out mura problem is solved, but cost increases significantly
Solution Approach 1:
The patent divides the compensation function into separate compensation circuits that can be independently designed and integrated, rather than requiring a complex PPCC function in the driver chip. This segmentation allows for simpler, more cost-effective implementation while achieving the same display uniformity improvement.
Solution Approach 2:
The compensation circuits use simple RC components (resistors and capacitors) that are inexpensive and easily manufactured, replacing the costly PPCC function. These passive components provide effective compensation at a fraction of the cost of active PPCC circuitry.
3Manufacturing precision
If compensation level increases, then capacitance or resistance value decreases, but circuit complexity increases
Solution Approach 1:
The compensation circuits use dynamic switching mechanisms that allow adjustment of compensation levels based on operating conditions. This dynamic approach enables accurate impedance compensation across different gray scales and scanning times without requiring multiple fixed compensation circuits, thus managing complexity.
Solution Approach 2:
The compensation is applied periodically during the scanning process, with different compensation levels selected for different scanning lines or time periods. This periodic application allows accurate compensation while using a single configurable circuit rather than multiple permanent circuits.
Data Source
AI summary
A driving circuit of a display panel and a driving method thereof are disclosed. The display panel includes multiple data lines and fan-out traces connected to the multiple fan-out traces in one-to-one correspondence. The driving circuit includes multiple compensation circuits and a signal input unit. Each compensation circuit includes an input terminal and an output terminal. The output terminals of the multiple compensation circuits are respectively connected to the plurality of fan-out traces. At least two gear positions are set in each compensation circuit. When the gear position of the compensation circuit increases, a capacitance value or a resistance value of the compensation circuit gradually decreases. The signal input unit outputs data signals to the input terminals of the multiple compensation circuits. Each compensation circuit selects a gear position depending on a gray scale of a data signal or a scanning time during progressive scanning of the display panel.