Liquid Crystal Display Frequency Division Timing Control

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Solution Overview

Problem

Conventional liquid crystal displays require multiple input signals for control, necessitating time-consuming adjustments to maintain a matching timing sequence, which hampers production efficiency.

Innovation Solution

A liquid crystal display system with frequency division units and a gate-driver-on-array (GOA) unit generates scanning signals from divided control signals, allowing time-division charging of pixels using fewer input signals, reducing the complexity of timing adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple input signals (MUX_1, MUX_2, CLK_1, CLK_2) are used to control the liquid crystal display, then the display can be controlled with higher resolution and more data lines, but the time required for adjusting the timing sequence of these signals increases significantly, reducing production efficiency

Engineering Contradiction:
Improvedisplay resolutionVSAvoidadjustment time for timing sequence
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements self-service by enabling the liquid crystal display to automatically generate internal timing signals through frequency division units and shift registers. The system uses a single external clock signal to automatically produce the required MUX control signals and scanning line timing signals, eliminating the need for manual adjustment of multiple external timing signals while maintaining high display resolution

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent applies universality by designing a single clock signal to serve multiple functions: it simultaneously controls the frequency division units, generates MUX switching signals, drives the shift registers, and coordinates the scanning lines. This multi-functional approach replaces the need for multiple separate input signals (MUX_1, MUX_2, CLK_1, CLK_2) with one universal clock signal, reducing adjustment time while preserving display resolution capabilities

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple separate control signals and clock signals are input independently, then the timing sequence can be precisely controlled, but the device complexity and the number of input terminals increase

Engineering Contradiction:
Improvetiming sequence precisionVSAvoidnumber of input signals
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces frequency division units as intermediary components that receive a single clock signal and automatically generate the required MUX control signals with precise timing relationships. These intermediary units act as signal generators that ensure accurate timing sequences without requiring multiple external input signals, thus reducing device complexity while maintaining timing precision

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the manual adjustment mechanism (mechanical system) with an automatic signal generation system using frequency division units and shift registers. Instead of manually adjusting the timing sequences of multiple input signals, the system automatically generates all necessary timing signals through electronic frequency division and shifting, reducing device complexity while preserving timing precision

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9818360B2Liquid crystal display and control method for the same
Publication Date: 2017.11.14 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US9818360B2 patent drawing
  • US9818360B2 patent drawing
  • US9818360B2 patent drawing

AI summary

An LCD and a control method for the same are disclosed. The LCD includes a first frequency division unit for receiving a first control signal, performing a frequency division to the first control signal to obtain a first clock signal; a second frequency division unit for receiving a second control signal, performing a frequency division to the second control signal to obtain a second clock signal; a GOA unit for generating a scanning signal according to the first and the second clock signal; and a control unit for receiving the first and the second control signal, and when the scanning signal is effective, controlling a first pixel and a second pixel to be charged in a time-division manner according to the first and the second control signal. Accordingly, reducing the number of inputted signals, the time for adjusting timing sequence of the inputted signals and improving the production efficiency.