Liquid Crystal Display Gate Line Discharge Voltage for Pulse Delay Reduction
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Solution Overview
Problem
Liquid crystal displays experience delays in scanning pulses due to parasitic capacitors and resistance components in gate lines, leading to reduced charging time and brightness, as well as overlapping of scanning pulses between adjacent lines, resulting in abnormal gray scale realization.
Innovation Solution
A liquid crystal display system that includes a timing controller, a discharging part generating a discharge voltage synchronized with the gate output enable signal, and a gate driver that supplies the scanning pulse and discharge voltage together to prevent delays and overlap, thereby enhancing pixel charging time and maintaining proper gray scale representation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If scanning pulses are supplied to gate lines in conventional liquid crystal displays, then pixel charging is enabled, but delays occur due to parasitic capacitors and resistance components, reducing charging time and brightness
Solution Approach 1:
The patent applies preliminary action by supplying a discharge voltage to the gate line before the scanning pulse arrives. This pre-charges or pre-discharges the parasitic capacitor based on the previous pixel state, so that when the scanning pulse comes, the voltage transition is faster and the charging time is extended. The discharge voltage is supplied in advance during the period when the previous pixel data is no longer needed, preparing the gate line for the upcoming scanning pulse.
Solution Approach 2:
The patent changes the voltage parameter of the gate line by introducing a discharge voltage that is different from both the high-level and low-level scanning pulse voltages. This discharge voltage is supplied during the interval between scanning pulses to reset or prepare the gate line voltage level, thereby changing the electrical parameters of the gate line to reduce delay effects caused by parasitic capacitance and resistance.
2Productivity
If scanning pulses are supplied to gate lines at high speed, then display refresh rate is improved, but overlapping of scanning pulses between adjacent lines occurs, resulting in abnormal gray scale representation
Solution Approach 1:
The patent applies preliminary action by supplying a discharge voltage to the gate line before the scanning pulse arrives. This pre-charges or pre-discharges the parasitic capacitor based on the previous pixel state, so that when the scanning pulse comes, the voltage transition is faster and the charging time is extended. The discharge voltage is supplied in advance during the period when the previous pixel data is no longer needed, preparing the gate line for the upcoming scanning pulse.
Solution Approach 2:
The patent implements feedback by using the gate output enable signal, which is generated based on the pixel data, to control the timing and application of the discharge voltage. The discharge voltage is supplied only when the previous pixel data is no longer needed, as determined by the gate output enable signal. This feedback mechanism ensures that the discharge voltage is applied at the appropriate moment to prevent overlapping without disrupting the normal scanning pulse timing, thereby maintaining gray scale accuracy while enabling high refresh rates.
Data Source
AI summary
A liquid crystal display for supplying a discharge voltage for preventing a delay to reduce a delay of a scanning pulse, and a driving method thereof are disclosed. In the liquid crystal display, a liquid crystal display panel has a plurality of gate lines. A timing controller supplies a gate output enable signal which controls a supply of a scanning pulse. A discharging part generates a discharge voltage in response to the gate output enable signal. And a gate driver supplies the discharge voltage together with a scanning pulse to the gate lines in response to the gate output enable signal.