LCD Gate Driver Clock Generation With Overcurrent Protection
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Solution Overview
Problem
There is a need to further improve the display quality of liquid crystal displays (LCDs) that utilize amorphous silicon thin film transistors (a-Si TFTs) for gate drivers, as existing methods do not fully optimize manufacturing cost, size, and performance characteristics.
Innovation Solution
The implementation of a clock generator in the LCD that includes stages and an overcurrent protector unit, which intercepts clock signals when the gate-on or gate-off voltage exceeds a reference level, and generates clock signals and clock bar signals based on a single gate clock signal with time delays, optimizing the gate driver's operation and reducing the risk of overcurrent conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate driver is packaged using TCP or COG method with gate driver IC, then manufacturing cost and size are reduced, but display quality is not sufficiently improved
Solution Approach 1:
The patent extracts the gate driver function from a separate IC package and integrates it directly onto the LCD panel using a-Si TFTs. This integration eliminates the need for external gate driver ICs and their associated packaging (TCP or COG methods), thereby improving display quality through better signal integrity while maintaining manufacturing simplicity through direct integration
Solution Approach 2:
The patent merges the gate driver circuitry with the LCD panel substrate by fabricating a-Si TFT-based driver circuits directly on the panel. This consolidation integrates multiple functions (display and driving) into a single structure, improving display quality through reduced signal paths while simplifying manufacturing by eliminating separate driver IC assembly steps
2Reliability
If the gate driver uses a-Si TFTs integrated on glass substrate, then design flexibility and performance are improved, but display quality still needs further improvement
Solution Approach 1:
The patent implements a clock generator circuit that can generate multiple clock signals (first clock signal and second clock signal with different phases) from a single input clock signal. This multi-functional circuit reduces the number of external clock inputs needed while maintaining the performance benefits of integrated a-Si TFT driver circuits, thereby improving display quality without proportionally increasing device complexity
Solution Approach 2:
The patent incorporates an overcurrent protector unit that proactively monitors and protects against overcurrent conditions before they can damage the circuit. This preliminary protection mechanism ensures reliable operation and improved display quality by preventing failures, while the protection function is integrated into the existing driver structure rather than adding significant complexity
3Reliability
If clock signals are generated without overcurrent protection, then circuit simplicity is maintained, but reliability is reduced due to overcurrent risk
Solution Approach 1:
The patent introduces an overcurrent protector unit as an intermediary component between the clock generator and the rest of the circuit. This protector acts as a mediator that monitors current levels and intercepts excessive current before it can cause damage, thereby improving circuit stability while adding minimal complexity since the protection function is integrated into the clock generator block
4Measurement precision
If multiple clock generation control signals are required, then clock signal accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple clock generation control functions into a single clock generator circuit block. The circuit accepts one clock generation control signal and internally generates both the first clock signal and the second clock signal with appropriate phase differences. This consolidation maintains precise clock timing control while reducing the number of external control signals needed, thereby improving timing accuracy without proportionally increasing device complexity
Data Source
AI summary
A liquid crystal display includes a gate driver including stages, and a clock generator which receives a clock generation control signal, generates a clock signal and a clock bar signal based on one or more of the clock generation control signal, a gate-on voltage and a gate-off voltage, and outputs the clock signal and the clock bar signal to the gate driver. The clock generator includes an overcurrent protector unit which intercepts at least one of the clock signal and the clock bar signal when a voltage level of at least one of the gate-on voltage and the gate-off voltage is greater than a reference level.