LCD Gate Driver Masking Circuit for Abnormal Image Prevention
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Solution Overview
Problem
Conventional liquid crystal display (LCD) devices experience abnormal image display due to control signals not having a normal state during a predetermined time period from power-on, causing issues like a white or black screen, especially during events like channel changes or signal changes.
Innovation Solution
A display device and method that includes a clock-state detecting circuit to identify normal or abnormal clock signal states and a masking circuit to modify the gate output enable signal based on the clock signal and reset signal states, ensuring the gate driver is disabled during abnormal states and predetermined times, preventing abnormal image display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate driver outputs gate voltages continuously after power-on, then the device can respond quickly to display updates, but abnormal images are displayed during the predetermined time period when control signals are not yet normal
Solution Approach 1:
The masking circuit performs preliminary masking of the gate output enable signal during the predetermined time period after power-on. By detecting the reset signal state and clock signal presence, the masking circuit proactively prevents abnormal gate voltage output before it can cause display issues, ensuring reliable image display from the moment control signals become normal.
2Reliability
If the masking circuit blocks the gate output enable signal during the predetermined time period, then abnormal image display is prevented, but the gate driver cannot output gate voltages even when control signals are normal
Solution Approach 1:
The masking circuit continuously monitors the reset signal state and clock signal presence to determine when to enable or block the gate output enable signal. This feedback mechanism ensures that the gate driver is enabled precisely when control signals are normal (improving productivity) while being blocked when signals are abnormal (maintaining reliability), achieving optimal balance between the two contradictory requirements.
3Reliability
If the masking circuit always blocks the gate output enable signal, then abnormal images are completely prevented, but normal image display and updates are also blocked
Solution Approach 1:
The masking circuit dynamically adjusts its masking behavior based on real-time detection of the reset signal state and clock signal presence. When the reset signal indicates power-on state and clock signal is absent, masking is applied to prevent abnormal images. When the clock signal is present (indicating normal operation), masking is removed to enable normal display functionality. This dynamic adaptation resolves the contradiction between preventing abnormal images and maintaining normal display operations.
Data Source
AI summary
A display device includes a display panel including a gate line and a data line, a gate driver that outputs a gate voltage to the gate line according to a gate output enable signal, a data driver that outputs a data voltage to the data line, a detecting circuit that detects a state of a clock signal. The state of the clock signal includes a normal or abnormal state. A masking circuit performs a masking operation for the gate output enable signal according to the state of the clock signal and a level of a reset signal, where the level of the reset signal includes a first or second level corresponding to a power-on or off of the display device, respectively.