LCD Gate Driver Spacer Layout to Prevent TFT Electrode Damage

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Solution Overview

Problem

The traditional manufacturing process of large-sized liquid crystal display panels involves multiple exposures, leading to stress on thin film transistors in the gate driver circuit area, which can cause metal precipitation and damage due to the placement of spacers in the middle of these transistors, exacerbated by moisture and temperature.

Innovation Solution

The spacers are positioned outside the second electrodes of the thin film transistors, reducing the stress on film layers and minimizing the risk of metal precipitation and transistor damage by employing a direct splicing method that aligns spacers along specific directions and avoids overlapping with critical components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If spacers are placed in the middle of thin film transistors in the gate driver circuit area, then the spacers can provide structural support and maintain panel integrity, but stress on the thin film transistors increases leading to metal precipitation and transistor damage

Engineering Contradiction:
Improvepanel integrityVSAvoidthin film transistor reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent extracts the spacers from the gate driver circuit area and relocates them to the display area only. This separation removes the harmful stress that spacers impose on thin film transistors while preserving the structural support function in the display region where spacers are needed for maintaining panel integrity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the spacer distribution by area type, placing spacers only in the display area and excluding the gate driver circuit area. This segmentation allows the display area to maintain structural stability while the gate driver area maintains transistor reliability without stress-induced damage.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If multiple exposures are used in the traditional mosaic splicing method, then the entire panel can be manufactured, but the manufacturing process becomes complex and time-consuming with up to 5 exposures needed for a 98-inch display panel

Engineering Contradiction:
Improvepanel sizeVSAvoidmanufacturing efficiency
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The patent merges the spacer formation process into a single direct splicing exposure that covers the entire panel including the gate driver circuit area. This combines multiple separate exposure steps into one unified process, reducing the number of exposures from 5 to 2 and significantly improving manufacturing efficiency while maintaining the ability to produce large-sized panels.

Inventive Principle:
Principle #5Merging (Combining)

3Shape

If spacers are positioned over the second electrodes of thin film transistors, then the spacers can be uniformly distributed across the panel, but stress on the film layers increases causing metal precipitation from the second electrodes

Engineering Contradiction:
Improvespacer distributionVSAvoidmetal precipitation
Core Design Contradiction:
ShapeVSObject-generated harmful factors

Solution Approach 1:

The patent extracts spacers from the gate driver circuit area where they would overlap with second electrodes of thin film transistors. This removal eliminates the stress concentration that causes metal precipitation from the second electrodes, while spacers remain uniformly distributed in the display area where they are needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20260063956A1Liquid crystal display panel
Publication Date: 2026.03.05 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US20260063956A1 patent drawing
  • US20260063956A1 patent drawing
  • US20260063956A1 patent drawing

AI summary

A liquid crystal display panel includes an array substrate and the array substrate includes: cascaded gate driver modules in the gate driver circuit area, the gate driver modules each including a first thin film transistor, the first thin film transistor including a first electrode and a second electrode, each first electrode being connected to a scan line located in the display area, and each second electrode being connected to a clock signal line; and a plurality of first spacers disposed in the gate driver circuit area. In a plan view of the liquid crystal display panel, the gate driver modules are arranged at intervals along a first direction, the first thin film transistors are arranged at intervals along the first direction, and the first spacers are located outside the second electrodes.