Gate Driving Circuit Segmentation for LCD Array Substrates
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Solution Overview
Problem
The configuration of gate driving circuits in existing liquid crystal display devices is prone to defects such as breaks in lines due to the lengthened branch lines connecting gate driving circuit lines to TFT elements, leading to signal delays and increased capacitance at intersections.
Innovation Solution
The array substrate design includes column groups of driving elements with trunk lines and branch lines arranged to reduce line lengths and intersections, using junction lines to connect branch lines to driving elements in different row groups, thereby minimizing breaks and signal delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If gate driving circuit lines are placed outside the gate driving circuit to connect to TFT elements, then the gate driving circuit can be positioned at the end side of the substrate, but the branch lines become excessively long which increases the risk of breaks and signal delays
Solution Approach 1:
The gate driving circuit is divided into multiple stages (first stage, second stage, etc.) arranged in sequence from the end side toward the display area. Each stage connects to specific row groups of TFT elements, creating a segmented architecture that reduces line lengths while maintaining circuit functionality at the substrate end
Solution Approach 2:
The patent introduces a two-dimensional arrangement of driving elements organized in both column groups and row groups. This spatial reorganization allows trunk lines to extend in one direction while branch lines connect in another direction, optimizing line lengths and reducing breaks without compromising the end-side positioning benefit
2Area of stationary object
If traditional gate driving circuit configuration is used with long branch lines, then circuit coverage is extensive, but the number of intersections between trunk lines and branch lines increases causing signal delays and increased capacitance
Solution Approach 1:
The circuit is segmented into distinct trunk lines and branch lines with minimal intersections. Each trunk line serves specific column groups and connects to multiple row groups through carefully positioned branch lines, reducing the total number of intersections and associated signal delays while maintaining comprehensive circuit coverage
Solution Approach 2:
The patent introduces driving elements as intermediary components that receive signals from trunk lines and distribute them to multiple row groups. This intermediary structure eliminates the need for numerous direct trunk-branch intersections, reducing capacitance and signal delay while preserving extensive circuit coverage
Data Source
AI summary
A gate driving circuit (60) separated into a plurality of stages (ST) is provided. In each of the stages (ST), TFT elements (T1) through (T4) are provided, branch lines (78) that connect clock lines (72, 74) to the TFT elements are provided. Junction lines (79A, 79B) are each extended from the branch line (78A) of interest to electrically connect the branch line (78A) of interest to the TFT elements (T2, T4) provided in the stage (ST(j)) different from the stage (ST (j−1)) where the TFT elements (T1, T3) connected to the branch line (78A) of interest are provided.