Gate Driving Circuit Segmentation for LCD Power Reduction
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Solution Overview
Problem
Liquid crystal display devices with Gate In Panel (GIP) type gate driving circuits face high power consumption due to the large capacitance of parasitic capacitors in amorphous silicon Thin Film Transistors (TFTs) used in the output buffer units, leading to increased energy usage and reduced image quality.
Innovation Solution
Implementing a time-divisional switching unit that divides clock pulses into multiple time-divisional clock pulses, reducing the load and capacitance of parasitic capacitors in the gate driving unit, thereby decreasing power consumption and improving image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon TFTs are used in the output buffer unit of the gate driving circuit, then the device can be manufactured with lower cost and simpler process, but the power consumption increases due to large parasitic capacitor capacitance
Solution Approach 1:
The gate driving circuit is divided into multiple independent gate driving integrated circuits, each handling a portion of the gate lines. This segmentation reduces the number of TFTs required in each output buffer unit, thereby reducing the parasitic capacitor capacitance and power consumption while maintaining ease of manufacture through standardized modular units.
Solution Approach 2:
The patent introduces a new dimensional approach by dividing the gate driving function across multiple integrated circuits arranged in a distributed manner. Instead of using a single large-scale gate driving circuit, multiple smaller circuits work in parallel, reducing the capacitance load on individual TFTs while maintaining overall system functionality.
2Device complexity
If the output buffer unit uses amorphous silicon TFTs with large parasitic capacitance, then the device structure can be simplified, but the rising time of scan pulses increases, degrading image quality
Solution Approach 1:
By segmenting the gate driving circuit into multiple integrated circuits, each with fewer TFTs in the output buffer unit, the parasitic capacitance is reduced. This enables faster scan pulse rising times and improved image quality while keeping each individual circuit structurally simple and manageable.
3Device complexity
If a single large-scale gate driving circuit is used, then the device structure is simpler, but the power consumption is high due to the large number of TFTs in the output buffer unit
Solution Approach 1:
The gate driving circuit is divided into multiple independent integrated circuits, each handling a subset of gate lines. This segmentation reduces the number of TFTs required in each output buffer unit, thereby reducing power consumption while maintaining reasonable structural integration through modular design.
Solution Approach 2:
Each gate driving integrated circuit is designed with localized functionality, optimizing the TFT configuration for its specific segment. This allows each local unit to operate more efficiently with lower power consumption while the overall system maintains integrated functionality through coordinated operation of multiple units.
Data Source
AI summary
A liquid crystal display device capable of reducing power consumption of a gate driving circuit and a method for driving the same are discussed. The liquid crystal display device includes a liquid crystal panel including pixel regions defined by gate lines and data lines, a timing controller for outputting a plurality of data control signals, a plurality of clock pulses and a start pulse, a time-divisional switching unit for time-dividing the plurality of clock pulses and outputting time-divisional clock pulses, a data driving unit for driving the data lines according to the plurality of data control signals, and a gate driving unit including a plurality of stages for sequentially outputting scan pulses according to the start pulse and the plurality of time-divisional clock pulses, wherein the stages receive the time-divisional clock pulses in units of blocks and each of the time-divisional clock pulses supplied to the blocks is different.