Liquid Crystal Display Manufacturing via Gate Insulating Layer Removal
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Solution Overview
Problem
Conventional liquid crystal display device manufacturing processes face challenges such as irregular transistor characteristics, high production costs, and the need for complex photo-etching processes, particularly in forming contacts and semiconductor layers, which affect the uniformity and reliability of the devices.
Innovation Solution
The process involves removing the gate insulating layer to streamline contact formation and utilizing anode-oxidization technology for source-drain wires, along with half-tone exposure to reduce the number of manufacturing steps, enabling the formation of channel-etch type insulating gate transistors with improved reliability and reduced costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional photo-etching processes are used to form contacts and semiconductor layers, then manufacturing precision can be maintained, but device complexity and production costs increase significantly
Solution Approach 1:
The invention extracts and removes the gate insulating layer to directly expose the gate electrode, eliminating the need for complex photo-etching processes to form contacts through multiple insulating layers. This direct exposure approach simplifies the manufacturing process while maintaining manufacturing precision.
Solution Approach 2:
The gate insulating layer is removed in advance before forming the semiconductor layers and contacts. This preliminary action allows subsequent layers to be formed directly on the gate electrode without requiring complex patterning through multiple insulating layers, thereby reducing device complexity.
2Device complexity
If gate insulating layer is removed to streamline contact formation, then manufacturing complexity is reduced, but transistor characteristic uniformity may be affected
Solution Approach 1:
The invention applies local quality by forming the plasma protecting layer only in specific regions where semiconductor layers will be deposited, and by selectively removing the gate insulating layer only in contact formation areas. This localized approach maintains transistor characteristic uniformity while simplifying contact formation processes.
Solution Approach 2:
A plasma protecting layer is introduced as an intermediary to protect specific regions during the gate insulating layer removal process. This mediator allows precise control over which areas have the gate insulating layer removed, ensuring uniform transistor characteristics while enabling streamlined contact formation.
3Ease of manufacture
If anode-oxidization technology is used for source-drain wires, then manufacturing costs are reduced, but process reliability may be compromised
Solution Approach 1:
The invention changes the physical-chemical parameters of the source-drain wires by applying anode-oxidation to form insulating oxide layers. This parameter change allows the use of simpler, lower-cost materials and processes while maintaining process reliability through controlled oxidation conditions that ensure proper insulation and electrical characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in more stable and cost-effective production of liquid crystal display devices with improved transistor characteristics and reduced manufacturing complexity, achieving high yield and quality without the need for half-tone exposure technology.
Implementation Method 1
removing a gate insulating layer to expose gate electrodes
Implementation Method 2
utilizing anode-oxidation technology for source-drain wires
Implementation Method 3
utilizing half-tone exposure to reduce the number of manufacturing steps
Data Source
AI summary
In a conventional manufacturing process where the number of manufacturing processes is reduced to form a semiconductor layer of a channel etch-type insulating gate-type transistor and source-drain wires in one photographic etching processing using half-tone exposure technology, the manufacturing margin is narrow, lowering the yield if the distance between the source and the drain wire shortens.A 4-mask process proposal needless of half-tone exposure technology is constructed by streamlining the formation of scan lines and pseudo-pixel electrodes at the same time, both comprising a laminate of a transparent conductive layer and a metal layer, and the formation of the transparent conductive pixel electrodes through removing the metal layers on the pseudo-pixel electrodes at the time of the formation of the opening in the passivation insulating layer, as well as by reducing the formation process of the opening through removing a gate insulating layer also at the formation of semiconductor layers for channel-etch type insulating gate transistors.