LCD Gate Line Recesses Eliminate Storage Capacitor
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Solution Overview
Problem
Conventional liquid crystal displays (LCDs) face challenges in enhancing luminance due to a reduced aperture ratio, which is limited by the critical dimension of gate interconnection lines and the presence of storage capacitors.
Innovation Solution
The design eliminates the storage capacitor, reduces the critical dimension of gate interconnection lines by forming recesses in the gate line and gate electrode, and uses a semiconductor layer with a channel region between the source and drain electrodes to increase the aperture ratio, thereby enhancing luminance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the critical dimension of gate interconnection lines is increased to form storage electrode simultaneously with gate electrode, then the manufacturing process is simplified, but the aperture ratio is reduced
Solution Approach 1:
The patent extracts and removes the storage capacitor component from the pixel structure. By eliminating the storage capacitor, the patent achieves higher aperture ratio without compromising the manufacturing process, as the gate electrode can still be formed with adequate critical dimension without needing to simultaneously form a storage electrode
2Illumination intensity
If the aperture ratio is increased to enhance luminance, then the display brightness is improved, but the critical dimension of gate interconnection lines must be reduced which complicates manufacturing
Solution Approach 1:
By removing the storage capacitor structure, the patent enables increased aperture ratio and thus higher luminance while maintaining adequate critical dimension for the gate interconnection lines, avoiding the need to reduce critical dimension below manufacturable limits
3Reliability
If storage capacitor is included in the pixel structure, then the electrical charge is maintained, but the aperture ratio is reduced and kickback voltage increases
Solution Approach 1:
The patent removes the storage capacitor from the pixel structure. The charge retention function is maintained through the liquid crystal capacitor formed between the pixel electrode and common electrode, while eliminating the aperture ratio reduction and kickback voltage issues associated with separate storage capacitors
Solution Approach 2:
The liquid crystal capacitor serves dual functions: it maintains the electrical charge (original storage capacitor function) and enables higher aperture ratio (display area function). This multi-functional approach eliminates the need for separate storage capacitor structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the aperture ratio, reduces parasitic capacitance, and minimizes kickback voltage, resulting in improved luminance and display efficiency without the need for a storage electrode.
Implementation Method 1
liquid crystal materials with dielectric anisotropy are included in the liquid crystal layer adjacent electrodes on the upper and lower substrates so that an electric field is generated between the electrodes and the interposed liquid crystal materials, and the electric field strengths are adjusted to control the transmittance of light passing through the substrates
Implementation Method 2
liquid crystal materials with dielectric anisotropy are included in the liquid crystal layer adjacent electrodes
Data Source
AI summary
A liquid crystal display (“LCD”) includes a data interconnection line including a data line, a source electrode as a branch of the data line, and a drain electrode formed spaced apart from the source electrode, a semiconductor layer formed under the data interconnection line and connected to the source electrode and the drain electrode below the source electrode and the drain electrode and forming a channel region, and a gate interconnection line formed under the semiconductor layer and including a gate line intersecting the data line, the gate line extending in a first direction and the data line extending in a second direction, and a gate electrode branched from the gate line, wherein the gate line includes a first recess having a first width and a first length.