Liquid Crystal Display Gate Line Segmentation for Power and Blur Reduction
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Solution Overview
Problem
Liquid crystal displays face issues with increased power consumption and vertical blurs due to differences in kickback and coupling capacitance between pixels, particularly with dot inversion and line inversion techniques.
Innovation Solution
The arrangement of gate lines, data lines, and pixels is optimized to reduce vertical blurs and power consumption by using multiple gate lines and data lines with specific connections and polarity variations, allowing for improved charging ratios and visibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dot inversion or N+1 inversion is used to prevent degradation phenomena, then reliability is improved, but power consumption increases
Solution Approach 1:
The gate lines are divided into multiple independent gate lines (first gate line, second gate line, third gate line) that can be controlled separately. This segmentation allows different polarity inversion schemes to be applied to different gate lines simultaneously, enabling reliability improvement through inversion while reducing overall power consumption by avoiding uniform inversion across all pixels.
Solution Approach 2:
Different polarity inversion strategies are applied to different regions controlled by different gate lines. The first gate line uses one inversion pattern while the second and third gate lines use different patterns, allowing local optimization of power consumption while maintaining reliability through polarity reversal where needed.
2Use of energy by moving object
If line inversion is used to reduce power consumption, then energy efficiency is improved, but vertical blurs occur due to kickback and coupling capacitance differences
Solution Approach 1:
By segmenting the display into multiple gate line regions with independent control, the patent can apply line inversion selectively to specific gate lines while maintaining different polarity patterns on adjacent gate lines. This reduces the harmful effects of kickback and coupling capacitance that cause vertical blurs, while still achieving power consumption benefits through inversion in controlled regions.
Solution Approach 2:
The patent employs asymmetric polarity arrangements where adjacent gate lines have different polarity patterns. This asymmetry in polarity distribution helps balance the kickback and coupling capacitance effects across different pixel regions, minimizing vertical blurs while maintaining the power savings from inversion techniques.
3Manufacturing precision
If multiple gate lines are used to improve charging ratio and visibility, then display quality is improved, but device complexity increases
Solution Approach 1:
Each gate line serves multiple functions: it controls a specific row of pixels for display purposes, simultaneously enables polarity inversion for reliability, and participates in the overall power management strategy. This multi-functionality justifies the increased number of gate lines by deriving multiple benefits from each additional line.
Solution Approach 2:
The patent introduces an additional dimension of control by using multiple gate lines with different polarity patterns, transforming a single-dimensional pixel control into a multi-dimensional control scheme. This enables improved charging ratios and display quality through selective control of different gate line regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces power consumption, minimizes vertical blurs, and enhances the visibility of liquid crystal displays by optimizing the connection and polarity of gate and data lines, leading to improved display quality and reduced production costs.
Implementation Method 1
applying voltages to two electrodes to generate an electric field on a liquid crystal layer and adjusting the intensity of the generated electric field to adjust the transmissivity of light passing through the liquid crystal layer
Implementation Method 2
liquid crystal layer
Data Source
AI summary
A liquid crystal display including a substrate, first and second rows of pixels each formed on the substrate and including a plurality of pixels, a first gate line extending in a row direction on the substrate and connected to the first row of pixels, a second gate line extending in the row direction on the substrate and connected to the first and second rows of pixels, a third gate line extending in the row direction on the substrate and connected to the second row of pixels and first and second data lines extending in a column direction on the substrate to transmit data voltages to a pixel group consisting of three columns of pixels.