LCD Line Addressing Sampling Circuit for Color Sequential Displays

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Solution Overview

Problem

Color sequential displays face challenges in switching speed constraints, leading to potential image defects, particularly when displaying information superimposed on a background, as they require rapid liquid crystal and control circuit switching.

Innovation Solution

A liquid crystal display with advanced line addressing means and a new process for color sequential image display, allowing for faster writing of information by selectively addressing only the necessary lines and distributing saved time to other phases, such as stabilization or light source activation, within the existing frame time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional line addressing is used in color sequential displays, then all N lines are written sequentially within each frame time, but the writing time per line becomes extremely short (less than 3 microseconds), causing insufficient stabilization time and potential image defects

Engineering Contradiction:
Improveframe rateVSAvoidimage quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies partial action by selectively writing only the M lines (where M < N) that contain non-zero image information, rather than writing all N lines. This is achieved through a sampling circuit that receives a pattern of N successive binary words, where each binary word indicates whether the corresponding line contains information to be displayed. By addressing only the necessary lines, the writing time is distributed more effectively, providing sufficient stabilization time while maintaining the required frame rate.

Inventive Principle:
Principle #16Partial or excessive action

2Manufacturing precision

If the writing time for each line is increased to improve image quality, then the frame time exceeds the imposed limit, reducing the frame rate

Engineering Contradiction:
Improveimage qualityVSAvoidframe rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent extracts and removes the unnecessary writing operations for lines that do not contain image information. By identifying and eliminating the writing of blank lines from the display memory, the total writing time within each frame is reduced. This extracted time is then available to increase the writing and stabilization time for the actual information lines, thereby improving image quality while maintaining the frame rate within the imposed time limit.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If rapid switching of liquid crystals and control circuits is used to maintain frame rate, then the switching speed constraints cause image defects

Engineering Contradiction:
Improveframe rateVSAvoidimage stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing the line selection and sampling operation before the actual writing phase. The sampling circuit预先 determines which lines contain information and prepares the addressing pattern in advance. This preliminary identification allows the display system to plan the writing sequence optimally, ensuring that sufficient time is allocated for both writing and stabilization of each line, thereby preventing image defects while maintaining the required frame rate.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2983167B1LCD display with line addressing by sampling and conversion, and display method
Publication Date: 2019.05.01 THALES SA
  • EP2983167B1 patent drawingFigure 1
  • EP2983167B1 patent drawingFigure 2

AI summary

The invention relates to liquid crystal displays, primarily sequential color displays. The display (N lines, P columns) includes a graphics processor that extracts from an image memory only the M lines containing non-zero luminance information for the color in question. For each line to be written (write time TL), the processor sends at high frequency (at least N/TL) to a set of N sampling and conversion circuits (one per line) a pattern representing the lines to be written (generally a single line), in the form of a sequence of N bits.The N samplers successively sample these bits as the sequence progresses, so as to sample and hold the i-th bit of the N-bit sequence in the sampling circuit, and produce a pattern of N control voltages VGon or VGoff on the rows according to the pattern of the received sequence, while the graphics processor applies the luminance data to be written to the columns. The operation is repeated only for the rows that contain luminance information to be written in the given color.