LCD Array Substrate Link Line Width Design
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Solution Overview
Problem
In liquid crystal display (LCD) devices, the increasing size of LC panels leads to longer data link lines, resulting in higher electrical resistance in peripheral regions, which causes uncharged problems due to decreased link pitches between adjacent data link lines, especially in high-resolution displays.
Innovation Solution
The solution involves designing gate and data link lines with different widths to achieve uniform resistance in link areas, where the widths of inclined portions of data link lines increase towards the peripheral regions, and link pitches are adjusted to maintain uniform resistances across the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the size of LC panels is increased to achieve larger display area, then the display area is improved, but the electrical resistance in peripheral regions increases due to longer data link lines
Solution Approach 1:
The patent applies local quality by making the link lines have different widths in different regions. Specifically, link lines in peripheral regions are designed with greater width than those in central regions, creating non-uniform local properties that compensate for the increased length and resistance in peripheral areas.
Solution Approach 2:
The patent changes the physical parameter of link line width to adjust electrical resistance. By varying the width parameter of link lines across different regions, the patent achieves uniform resistance characteristics despite differences in link line length caused by panel size expansion.
2Measurement precision
If the link pitches between adjacent data link lines are decreased to accommodate more lines in high-resolution displays, then the resolution is improved, but the electrical resistance increases due to longer link lines
Solution Approach 1:
The patent applies local quality by differentiating link line widths based on their position and length characteristics. Link lines experiencing greater resistance due to longer paths are given larger widths locally, while link lines in shorter paths maintain smaller widths, achieving uniform resistance across all link lines regardless of their pitch or length.
3Reliability
If the widths of link lines are increased to reduce electrical resistance, then the electrical resistance is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent implements local quality with a practical approach: only specific link lines (those in peripheral regions or with longer lengths) are given different widths, while most link lines maintain a standard width. This selective differentiation reduces manufacturing complexity compared to making all link lines different, while still achieving the goal of uniform resistance.
Data Source
AI summary
An array substrate for a liquid crystal display device includes a substrate including a display area and a non-display area, the non-display area having a link area and a pad area, array elements in the display area on the substrate, first to nth pads in the pad area (n is a natural number), first to nth link lines in the link area and connected to the first to nth pads, respectively, wherein the first to (n/2−1)th link lines are symmetrical with the nth to (n/2+1)th link lines with respect to (n/2)th link line, the first to (n/2−1)th link lines have inclined portions, and the inclined portions of the first to kth link lines have decreasing widths and decreasing lengths toward the kth link line from the first link line, wherein k is larger than 1 and smaller than (n/2).