LCD Manufacturing Masking Process Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for manufacturing liquid crystal display (LCD) devices require multiple masking processes, which decrease productivity and increase manufacturing costs due to the high price of masks and the complexity of forming patterns on substrates.
Innovation Solution
An LCD device manufacturing method that forms a common electrode and contact holes exposing drain electrodes through a single masking process, reducing the number of masks needed and simplifying the formation process by using a diffraction mask with transmission, semipermeable, and blocking regions to simultaneously create the common electrode and third contact holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masking processes are used to form patterns on substrates, then manufacturing precision is improved, but productivity decreases and manufacturing costs increase
Solution Approach 1:
The patent combines multiple masking processes into a single masking step by using a multi-layer conductive structure where the first conductive film forms both the gate electrode and the common electrode pattern simultaneously. This merging of operations eliminates sequential masking steps, thereby improving productivity without sacrificing pattern formation precision.
Solution Approach 2:
The first conductive film serves multiple functions: it forms the gate electrode in transistor regions and simultaneously forms the common electrode in display regions. This multi-functionality allows a single masking process to achieve what previously required multiple separate masking steps, resolving the contradiction between precision and productivity.
2Manufacturing precision
If multiple masking processes are used to form patterns on substrates, then manufacturing precision is improved, but manufacturing costs increase due to high price of masks
Solution Approach 1:
By merging the formation of the gate electrode and common electrode into a single masking step using the first conductive film, the patent reduces the number of expensive masks required. This directly lowers manufacturing costs while maintaining the necessary pattern precision through the integrated design.
Solution Approach 2:
The first conductive film is designed to serve dual purposes as both gate electrode and common electrode material. This universality eliminates the need for separate masking processes for each component, reducing mask procurement costs and simplifying the manufacturing process.
3Device complexity
If multiple masking processes are used to form patterns on substrates, then device complexity is reduced through systematic fabrication, but productivity decreases due to process complexity
Solution Approach 1:
The patent merges multiple fabrication operations into a single integrated process step where the first conductive film deposition and patterning simultaneously creates both gate and common electrode structures. This reduces the overall process complexity and eliminates sequential steps, thereby improving manufacturing throughput.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the number of masks required, thereby decreasing manufacturing costs and increasing productivity by simplifying the masking process and allowing for the simultaneous formation of the common electrode and contact holes.
Implementation Method 1
using a diffraction mask with transmission, semipermeable, and blocking regions to simultaneously create the common electrode and third contact holes
Data Source
AI summary
A method of manufacturing an LCD device is disclosed. The LCD device manufacturing method includes: forming first and second active patterns on P-channel and N-channel thin film transistor formation regions of a substrate using a first masking process, respectively; forming a first gate electrode on the P-channel thin film transistor formation region of the substrate using a second masking process; forming a second gate electrode on the N-channel thin film transistor formation region of the substrate using a third masking process; forming first contact holes partially exposing the respective N and P source regions and second contact holes partially exposing the respective N and P drain regions, using a fourth masking process; forming N and P source electrodes connected to the N and P source regions, and N and P drain electrodes connected to the N and P drain regions, using a fifth masking process; simultaneously forming third contact holes and a common electrode using a sixth masking process; forming fourth contact holes, which expose the respective N and P drain electrodes, using a seventh masking process; and forming a pixel electrode using a eighth masking process.