LCD Output Buffer Arrangement for Channel Offset Compensation

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Solution Overview

Problem

Conventional LCD devices struggle to simultaneously horizontally and vertically compensate offsets between channels, leading to brightness differences and flickering issues due to mismatched transistors in output buffers, which are not effectively addressed by existing inversion driving methods.

Innovation Solution

The method involves alternately arranging first and second type output buffers in units of rows and columns to create a symmetrical structure, ensuring that output buffers with opposite types are arranged in adjacent columns or rows, thereby compensating for offsets both horizontally and vertically.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional output buffers are used with single polarity inversion, then pixel deterioration is prevented, but offset between channels causes brightness differences and flickering

Engineering Contradiction:
Improvepixel durabilityVSAvoidbrightness uniformity
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The patent applies asymmetry by using different inversion patterns for different pixel groups. Specifically, first pixel groups use vertical inversion while second pixel groups use horizontal inversion, creating intentional asymmetric treatment across the display panel. This asymmetric approach allows offset compensation in both vertical and horizontal directions simultaneously, eliminating brightness differences and flickering while maintaining pixel reliability through continued polarity inversion.

Inventive Principle:
Principle #4Asymmetry

2Illumination intensity

If dot inversion driving method is used to reduce flicker, then luminance difference between pixels is reduced, but offset between channels remains unaddressed

Engineering Contradiction:
Improveluminance uniformityVSAvoidchannel offset compensation
Core Design Contradiction:
Illumination intensityVSManufacturing precision

Solution Approach 1:

The patent segments the display panel into multiple pixel groups with different inversion characteristics. By dividing pixels into first pixel groups (vertical inversion) and second pixel groups (horizontal inversion), the system can independently compensate for offsets in different directional channels. This segmentation enables precise offset compensation for both vertical and horizontal channels simultaneously, while maintaining the flicker-reducing benefits of dot inversion driving.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If source driver channels are arranged conventionally, then device complexity is low, but horizontal and vertical offset compensation cannot be achieved simultaneously

Engineering Contradiction:
Improvedriver structureVSAvoidoffset compensation precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent extends the compensation approach from a single dimension to two dimensions by implementing both vertical inversion for first pixel groups and horizontal inversion for second pixel groups. This dimensional expansion allows the system to address offset issues in both vertical and horizontal channels simultaneously without significantly increasing device complexity, achieving precise two-dimensional offset compensation through the coordinated operation of the source driver channels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8441473B2Method for removing offset between channels of LCD panel
Publication Date: 2013.05.14 SILICON WORKS CO LTD
  • US8441473B2 patent drawing
  • US8441473B2 patent drawing
  • US8441473B2 patent drawing

AI summary

A method of removing offsets between channels of a liquid crystal panel is provided. The method includes: alternately arranging first type output buffers and second type output buffers for driving the pixels in units of at least two rows of the pixels; and arranging the first type output buffers and the second type output buffers in units of at least two columns of the pixels so that the output buffers with types opposite to those of previous two columns are arranged. The second type output buffers are embodied by switching connections among the differential transistors and connections among the load transistors in the first type output buffers.