LCD Pixel Circuit Layout for High Aperture and Capacitance
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Solution Overview
Problem
In liquid crystal display (LCD) pixel structures, expanding the area of the capacitor electrode to increase capacitance reduces the aperture ratio, leading to increased power consumption due to overlapping with data lines.
Innovation Solution
The capacitor electrode is positioned on the first insulating layer between the gate and channel, with a thin second insulating layer between the capacitor electrode and the drain, reducing the capacitor area and avoiding overlap with data lines, thus maintaining a high aperture ratio without increasing loading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the capacitor electrode area is expanded to increase capacitance, then the storage capacitor capacitance is improved, but the aperture ratio is reduced
Solution Approach 1:
The capacitor electrode is repositioned from a planar expansion approach to a three-dimensional configuration utilizing multiple insulating layers. The capacitor electrode is disposed on the first insulating layer between the gate and channel, with the second insulating layer covering it, creating a stacked structure that increases capacitance without occupying additional pixel area.
2Area of stationary object
If the capacitor electrode is positioned to increase aperture ratio, then the aperture ratio is improved, but the loading increases due to overlap with data line
Solution Approach 1:
The capacitor electrode is positioned in a specific local region of the pixel structure - on the first insulating layer between the gate and channel - rather than in the conventional position below the data line. This localized positioning avoids overlap with the data line, preventing increased loading and power consumption while maintaining high aperture ratio.
3Area of stationary object
If the capacitor electrode area is reduced to maintain aperture ratio, then the aperture ratio is improved, but the capacitance is reduced
Solution Approach 1:
The patent employs a composite multi-layer insulating structure consisting of the first insulating layer, capacitor electrode, and second insulating layer. This composite configuration allows the capacitor to achieve sufficient capacitance in a compact form factor by utilizing the dielectric properties of multiple layers rather than relying on a single large-area electrode.
Data Source
AI summary
An active device, a pixel structure, and a display panel are provided. The pixel structure includes a scan line, a data line, an active device, a first insulating layer, a pixel electrode, a capacitor electrode, and a second insulating layer. The active device includes a gate, a channel, a source, and a drain. The gate is electrically connected to the scan line. The source is electrically connected to the data line. The first insulating layer is disposed between the gate and the channel. The pixel electrode is electrically connected to the drain. The capacitor electrode is located on the first insulating layer. The second insulating layer is located between the capacitor electrode and the drain.