Liquid Crystal Display Pixel Charging Uniformity

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Solution Overview

Problem

Liquid crystal displays (LCDs) experience color distortion due to differing charge rates of pixels, caused by sequential enabling of switch enable lines which results in varying charge times for pixels corresponding to the same first data line.

Innovation Solution

The implementation of a liquid crystal display system that utilizes partially overlapping enable signals for consecutive gate lines and sequentially enabled switch enable lines to extend the charging time of pixels, ensuring uniform charge rates across all pixels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If switch enable lines are sequentially enabled to control data line switches, then the number of simultaneous switching operations is reduced, but pixel charge times become unequal (T1>T2>T3) causing color distortion

Engineering Contradiction:
Improveswitching control complexityVSAvoidpixel charge uniformity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-enabling the gate line before the switch enable lines are sequentially activated. The gate line enable signal is extended to overlap with the sequential switch enable signals, ensuring that the pixel switching elements are already active before data voltage is applied through the data line switches. This preliminary preparation of the pixel switching state eliminates the charge time inequality (T1>T2>T3) that caused color distortion, while maintaining the sequential switching control structure.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If sequential enabling of switch enable lines is used, then switching control is simplified, but charging rates of pixels become different leading to color distortion

Engineering Contradiction:
Improveswitching control easeVSAvoiddisplay quality
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent merges the gate line enable signal with the sequential switch enable signals by creating a time overlap between them. The gate line remainse enabled during the entire duration that the switch enable lines are being sequentially activated. This merging of timing signals ensures that all pixels remain in a switched-on state throughout the sequential data voltage application process, maintaining uniform charging rates across all pixels while preserving the simplified sequential control mechanism.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If gate line enable signal duration is extended to overlap with next gate line, then pixel charging time is extended and uniformity is improved, but timing complexity increases

Engineering Contradiction:
Improvepixel charge uniformityVSAvoidtiming control complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements periodic action through the overlapping enable signals of consecutive gate lines. The enable signal of gate line G1 is extended to overlap with the enable signal of gate line G2, creating a periodic pattern where gate lines are activated in an overlapping sequence. This periodic overlapping structure systematically extends pixel charging time and ensures uniformity across all pixels, while the regular periodic nature of the overlap makes the timing control predictable and manageable despite the increased complexity.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9501995B2Liquid crystal display and method of charging/discharging pixels of a liquid crystal display
Publication Date: 2016.11.22 AU OPTRONICS CORP
  • US9501995B2 patent drawing
  • US9501995B2 patent drawing
  • US9501995B2 patent drawing

AI summary

A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches.