Liquid Crystal Display Pixel Circuit with Dual Memory Segmentation
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Solution Overview
Problem
Display devices using a field-sequential method with a liquid crystal unit face issues such as prolonged latency, reduced frame frequency, and color break due to shorter light emission times, leading to dark images and noticeable color separation, especially with increased pixel numbers and screen sizes.
Innovation Solution
A display device and operation method that utilize a pixel structure with multiple memory circuits connected to a liquid crystal unit, allowing for simultaneous writing and reading of image data and potential settings across multiple pixels, enabling high-speed operation and improved light emission times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a field-sequential method is used to increase aperture ratio and pixel count, then light transmittance and pixel density are improved, but light emission time is reduced causing dark images and color break
Solution Approach 1:
The patent segments the image data writing process into multiple stages using multiple memory circuits. Image data is written to multiple memory circuits in parallel, then read out sequentially while the liquid crystal unit responds, effectively extending the light emission time without reducing aperture ratio.
Solution Approach 2:
The patent performs preliminary writing of image data to multiple memory circuits before the light emission phase. This allows the liquid crystal unit to be driven at high speed while the stored image data is read out sequentially, ensuring sufficient light emission time for each color.
2Use of energy by moving object
If field-sequential method is used to reduce power consumption, then energy efficiency is improved, but frame frequency is reduced causing prolonged latency
Solution Approach 1:
The patent divides the frame into multiple sub-frames corresponding to different colors, with each sub-frame being processed independently. Multiple memory circuits handle different color data simultaneously, enabling parallel processing that maintains high frame frequency while reducing overall power consumption through efficient time-multiplexed operation.
Solution Approach 2:
The patent ensures continuous operation by writing image data to multiple memory circuits in parallel while sequentially reading them out to drive the liquid crystal unit. This continuous pipeline operation maintains high frame frequency without excessive power consumption.
3Productivity
If light emission time is shortened to increase frame frequency, then productivity is improved, but image brightness is reduced
Solution Approach 1:
The patent segments image data into multiple color components stored in separate memory circuits. Each color component is read out and displayed sequentially with sufficient emission time, while the next color data is being written, maintaining high frame frequency without sacrificing brightness.
Solution Approach 2:
Image data for subsequent colors is preliminarily written to memory circuits during the emission phase of previous colors. This allows the liquid crystal unit to receive continuous data supply without waiting for complete frame processing, maintaining high frame frequency with adequate brightness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances display speed, aperture ratio, and image brightness, reducing color break and power consumption while maintaining high image quality, even in large-sized displays with high pixel densities.
Implementation Method 1
a liquid crystal unit as a display unit
Data Source
AI summary
A display device operating at high speed is provided.The display device includes a pixel provided with a first memory circuit, a second memory circuit, and a display unit, in which the first memory circuit and the second memory circuit are electrically connected to one electrode of the display unit. The operation of the display device includes a first period of writing first image data to the first memory circuit and writing second image data to the second memory circuit, a second period of supplying a first potential to the first memory circuit, a third period of displaying a first image corresponding to the first image data, a fourth period of setting a potential of the one electrode of the display unit to a second potential, a fifth period of supplying the first potential to the second memory circuit, and a sixth period of displaying a second image corresponding to the second image data.