LCD Pixel Interlacing for Power and Uniformity

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Solution Overview

Problem

Liquid crystal display (LCD) systems face high power consumption due to frequent changes in data signal polarity, which are necessary for maintaining optical uniformity.

Innovation Solution

The LCD design interlaces data signal input to pixel electrodes such that odd and even rows in the same column receive signals from different data lines, with each row controlled by specific gate lines, allowing adjacent pixel electrodes to have different polarities without changing signal polarity within a frame.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If data signal polarity is changed frequently to maintain optical uniformity, then optical uniformity is improved, but power consumption increases

Engineering Contradiction:
Improveoptical uniformityVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent segments the pixel electrode array into odd rows and even rows, assigning different data lines to each segment. Odd rows in the same column receive signals from one data line while even rows receive signals from another data line. This segmentation allows adjacent pixel electrodes to have different polarities without requiring frequent polarity changes across the entire display, thus maintaining optical uniformity while reducing power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by controlling different regions of the pixel electrode array with different data line assignments. Specifically, odd rows are controlled by one set of data lines while even rows are controlled by another set. This localized control strategy ensures that polarity changes are minimized in each region while maintaining the overall optical uniformity requirement across the display.

Inventive Principle:
Principle #3Local quality

2Stability of the object's composition

If data signal polarity is changed frequently to maintain optical uniformity, then optical uniformity is improved, but device complexity increases

Engineering Contradiction:
Improveoptical uniformityVSAvoidsignal control complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent divides the pixel electrode array into segments (odd rows and even rows) with different data line assignments. This segmentation simplifies the signal control complexity by allowing each segment to be controlled independently with stable polarity, eliminating the need for frequent polarity changes across the entire display while maintaining optical uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a dimensional approach by assigning data lines based on row parity (odd/even) rather than column-based sequential assignment. This dimensional reorganization allows for more efficient polarity management and reduces the complexity of signal control while achieving the same optical uniformity goal.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8743097B2Liquid crystal display
Publication Date: 2014.06.03 BOE TECHNOLOGY GROUP CO LTD
  • US8743097B2 patent drawing
  • US8743097B2 patent drawing
  • US8743097B2 patent drawing

AI summary

A liquid crystal display comprising an array substrate formed with gate lines, data lines and pixel electrodes. Odd rows of pixel electrodes in the same column are connected with one of data lines at two sides of the column, even rows of pixel electrodes are connected with the other one of the data lines; pixel electrodes in the same row are controlled by one of the two gate lines at two sides of the row of pixel electrodes, pixel electrodes controlled by each gate line are located in the same row; there are two gate lines between two adjacent rows of pixel electrodes; two adjacent pixel electrodes in the same row between two adjacent data lines are controlled by one of the two gate lines at two sides of the row of pixel electrodes, and they are connected with one of the two adjacent data lines.