LCD Array Substrate Polarity Inversion for Crosstalk Reduction
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Solution Overview
Problem
Conventional LCD panels using the data line sharing mechanism experience poor display quality due to crosstalk caused by unstable electrical potential of the common electrode, resulting from capacitor coupling between sub-pixel and common electrodes, leading to issues with color mixing and brightness inconsistencies.
Innovation Solution
The implementation of an array substrate with polarity inversion of drive voltage signals in data lines, where sub-pixels are connected to odd and even gate lines through switch units, ensuring that sub-pixels of the same color type in adjacent data lines have inverted polarity, stabilizing the common electrode's electrical potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If data line sharing mechanism is used to reduce manufacturing cost, then the number of data lines is halved and source driver amount is reduced, but the electrical potential of common electrode drifts causing crosstalk and poor display quality
Solution Approach 1:
The patent inverts the polarity of drive voltage signals in adjacent data lines. Specifically, when one data line applies a positive polarity voltage to sub-pixels, the adjacent data line applies a negative polarity voltage to its sub-pixels, and vice versa. This polarity inversion prevents the coupling capacitance from causing common electrode potential drift, thereby eliminating crosstalk while maintaining the data line sharing mechanism for cost reduction.
2Use of energy by moving object
If column inversion driving method is used to reduce power consumption, then the switch frequency of data line polarity is lowered and power consumption is reduced, but the common electrode potential becomes unstable due to capacitor coupling
Solution Approach 1:
The patent applies preliminary anti-action by inverting the polarity of drive voltage signals in adjacent data lines before the coupling capacitance can cause potential drift. This pre-established polarity opposition counteracts the harmful coupling effect, stabilizing the common electrode potential while maintaining the low-power column inversion driving method.
3Device complexity
If sub-pixels in adjacent data lines have the same polarity, then the driving waveform is simple and power consumption is low, but the coupling capacitance causes common electrode potential drift and crosstalk
Solution Approach 1:
The patent implements polarity inversion where sub-pixels in adjacent data lines have opposite polarities. When one data line uses positive polarity, the adjacent data line uses negative polarity. This inversion creates opposing electric fields that cancel out the coupling capacitance effect, preventing common electrode potential drift and eliminating crosstalk while maintaining relatively simple driving waveforms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents the drifting of the common electrode's electrical potential, thereby enhancing display quality by reducing crosstalk and maintaining consistent brightness across different display regions.
Implementation Method 1
the liquid crystal capacitor C_lc and storage capacitor C_st related to the common electrode E_cm generates a coupling capacitance therebetween so that electrical potential of the common electrode E_cm is drifted
Data Source
AI summary
An array substrate is described. The array substrate with a polarity inversion of drive voltage signal in a plurality of data lines comprises a plurality of gate line sets being sequentially arranged, wherein each gate line set comprises two gate lines having an odd gate line and an even gate line respectively; a plurality of data line sets being sequentially arranged and vertically interlaced with the gate line sets, wherein each data line set comprises two data lines having an odd data line and an even data line respectively; wherein a plurality of sub-pixels are sequentially disposed between two adjacent gate line sets, connection positions of a portion of sub-pixels to the odd gate line and the even gate line in one gate line set respectively are changed in a predetermined amount of data line spaced apart.