LCD Subpixel Voltage Control via Shared Resistor
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Solution Overview
Problem
The aperture ratio of liquid crystal displays (LCDs) is reduced due to the presence of thin film transistors (TFTs) and contact holes when attempting to achieve side visibility comparable to front visibility by dividing one pixel into two subpixels with different transmittances.
Innovation Solution
The implementation of a resistor structure between the data line and the TFTs, which includes a resistor input terminal connected to the data line and a resistor output terminal connected to the TFT, allows for different voltages to be applied to subpixels without additional TFTs or contact holes, thereby maintaining a high aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If one pixel is divided into two subpixels with different transmittances to achieve side visibility comparable to front visibility, then side visibility is improved, but the aperture ratio is reduced due to additional TFTs and contact holes
Solution Approach 1:
The patent merges the resistor function into the existing TFT structure by forming the resistor semiconductor layer in the same semiconductor layer as the TFT channel. This integration eliminates the need for separate resistor structures and additional contact holes, thereby maintaining high aperture ratio while achieving different voltage application to subpixels for improved side visibility
Solution Approach 2:
The semiconductor layer serves multiple functions: it acts as the channel for the TFT switching element and simultaneously forms the resistor structure. This multi-functionality reduces the number of required components and contact holes, preventing aperture ratio reduction while enabling differential voltage control for side visibility improvement
Data Source
AI summary
A liquid crystal display according to an exemplary embodiment includes a first substrate, a gate line and a data line disposed on the first substrate, a first thin film transistor (“TFT”) and a second TFT connected to the gate line and the data line, a first subpixel electrode connected to the first TFT, a first resistor connected to the second TFT, and a second subpixel electrode connected to the first resistor.


