LCD Scan-Line Driving Circuit Uniform Pulse Potential
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Solution Overview
Problem
In conventional LCD apparatuses, scan drivers receive the output enable signal with different delay degrees, causing scan pulses to be pulled down to different potentials before being compulsorily pulled down to the logic low potential, which does not effectively improve image flicker.
Innovation Solution
The introduction of a PWM signal generating circuit with different impedance values and capacitors, along with transistors and turn-on control signals, ensures that scan pulses are pulled down to the same potential before being compulsorily pulled down to the logic low potential, by controlling the discharging rate of external capacitors based on the delay degree of the output enable signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If scan drivers are disposed in different positions of the display panel, then the coverage of scan drivers is improved, but the signal-transmitting paths become different causing delay degrees to vary
Solution Approach 1:
The patent applies local quality by configuring different impedance values for impedance elements connected to different scan drivers. Specifically, the impedance connected to the first scan driver has a first impedance value, while the impedance connected to the second scan driver has a second impedance value that is different from the first. This local differentiation compensates for the different signal transmission delays caused by different positions of scan drivers in the display panel.
2Productivity
If output enable signal is transmitted to scan drivers through different paths, then the scanning coverage is improved, but the delay degrees of signal reception vary among scan drivers
Solution Approach 1:
The patent changes the impedance parameter to compensate for signal reception delays. By setting different impedance values for different scan drivers based on their respective delay degrees, the system achieves uniform scan pulse potentials despite different transmission paths. The impedance values are specifically selected to counterbalance the delay differences, ensuring that scan pulses from all scan drivers reach the same potential level.
3Device complexity
If scan pulses are pulled down to logic low potential without uniform potential control, then the circuit complexity is reduced, but image flicker caused by feed-through effect is not effectively improved
Solution Approach 1:
The patent applies preliminary action by controlling the potential of scan pulses before they are compulsorily pulled down to logic low potential. The impedance elements and capacitors work together to ensure that scan pulses from different scan drivers are pulled down to the same potential level before the final logic low potential is applied. This preliminary potential equalization effectively reduces image flicker caused by the feed-through effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures that scan pulses generated by scan drivers are uniformly pulled down to the same potential, effectively reducing image flicker by synchronizing the shading operation across all scan drivers despite varying delay degrees in the output enable signal.
Implementation Method 1
the capacitor has a first terminal and a second terminal, and the first terminal of the capacitor is electrically coupled to the ground potential. The first scan driver comprises a first core circuit and a first transistor. The first source/drain terminal of the first transistor is electrically coupled to the first PWM signal input terminal and the second terminal of the capacitor
Implementation Method 2
The resistance value of the second impedance is different from that of the first impedance... controlling the discharging rate of external capacitors based on the delay degree of the output enable signal
Data Source
AI summary
A scan-line driving device for a LCD apparatus is provided. The scan-line driving device comprises a PWM signal generating circuit, two impedances with different resistance values, a capacitor and two scan drivers. The PWM signal generating circuit outputs a PWM signal with two potentials and a predetermined duty cycle. A terminal of the capacitor is electrically coupled to a ground potential, and the other terminal of the capacitor receives the PWM signal. Each of the scan drivers comprises a core circuit and a transistor. A source/drain terminal of each transistor is electrically coupled to a PWM signal input terminal of a corresponding core circuit and the other terminal of the capacitor, the other source/drain terminal of each transistor is electrically coupled to the ground potential through a corresponding one of the impedances, and the gate terminal of each transistor receives a turn-on control signal.