LCD Semiconductor Pattern Etching for Aperture Ratio
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Solution Overview
Problem
In liquid crystal display devices, the semiconductor layer extending under drain wirings can cause electrical short circuits and light scattering, leading to a decrease in aperture ratio due to the need for wider gaps between wirings and larger black matrices.
Innovation Solution
A manufacturing method that forms a semiconductor pattern with a portion under the metal pattern and an extending portion, allowing for precise etching to remove the extending portion during through-hole formation, preventing electrical shorts and maintaining a narrow gap between wirings without increasing manufacturing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor layer is formed larger in width than the metal layer to account for misalignment, then misalignment is tolerated, but the extending semiconductor layer causes electrical short circuits and light scattering
Solution Approach 1:
The etching process is segmented into two distinct regions: a first region for forming through-holes to access metal patterns, and a second region for removing extending semiconductor layers. This spatial segmentation allows selective processing of different areas, enabling misalignment tolerance while preventing harmful extensions.
Solution Approach 2:
Different etching treatments are applied to different regions of the insulating layer. The first region undergoes etching to create through-holes for electrical connection, while the second region undergoes etching to remove extending semiconductor portions. This local differentiation resolves the contradiction by allowing the semiconductor layer to extend for misalignment tolerance while removing extensions that cause electrical shorts and light scattering.
2Reliability
If the gap between drain wirings is widened to prevent electrical short circuits, then electrical short circuit is avoided, but the aperture ratio decreases
Solution Approach 1:
The extending semiconductor layers that could cause electrical short circuits are extracted and removed in the second region during the etching process. This eliminates the need to widen gaps between drain wirings for short circuit prevention, thereby maintaining a high aperture ratio while ensuring electrical isolation.
3Object-affected harmful factors
If a larger black matrix is used to cover light scattering regions, then light scattering is prevented, but the aperture ratio decreases
Solution Approach 1:
The extending semiconductor layers that would cause light scattering are removed in advance during the etching process in the second region. This preliminary removal eliminates the need for a larger black matrix to cover light scattering areas, thereby maintaining a high aperture ratio while preventing light scattering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for appropriate processing of the semiconductor pattern under the metal pattern, preventing electrical shorts and maintaining a high aperture ratio by removing the extending semiconductor portion, thus avoiding the need for wider gaps and larger black matrices.
Implementation Method 1
etching the insulating layer in a first region located above the metal pattern and a second region located above at least the second portion of the semiconductor pattern; and then providing liquid crystal between the first substrate and a second substrate facing the first substrate
Data Source
AI summary
Provided is a manufacturing method for a liquid crystal display device, in which a semiconductor pattern and a metal pattern are formed so that the semiconductor pattern includes a first portion formed under the metal pattern and a second portion which outwardly extends off the metal pattern from the first portion. An insulating layer for covering the metal pattern and the semiconductor pattern is formed. The insulating layer is subjected to etching in a first region located above the metal pattern and in a second region located above at least the second portion of the semiconductor pattern. In the etching step, the insulating layer in the first region is subjected to etching to form a through hole for electrical connection to the metal pattern, and the insulating layer and the semiconductor pattern in the second region are subjected to etching to remove the second portion of the semiconductor pattern.


