LCD Shift Register Stages Using Clock-Pulse Node Discharge

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Solution Overview

Problem

Conventional shift registers for liquid crystal display (LCD) devices face issues with high load on the discharging voltage source line, leading to potential malfunctions and increased size, which limits their integration in the liquid crystal panel.

Innovation Solution

The proposed shift register design reduces the load on the discharging voltage source line by using clock pulses to discharge nodes instead of a dedicated discharging voltage source, and optimizes the number of switching devices and stages to minimize size, allowing for more efficient sequential output of scan pulses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dedicated discharging voltage source is used to discharge nodes in each stage, then the node can be maintained in a discharging state, but the load on the discharging voltage source line increases significantly

Engineering Contradiction:
Improvenode discharging state maintenanceVSAvoidload on discharging voltage source line
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The clock pulse signal is given dual functionality: it serves both to drive the output transistor and to discharge the node through the discharge transistor. This eliminates the need for a separate dedicated discharging voltage source, reducing the load on the discharging voltage source line while maintaining reliable node discharging.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If at least two nodes and multiple switching devices are provided in each stage to control nodes, then the node control function is achieved, but the shift register size increases

Engineering Contradiction:
Improvenode control functionVSAvoidshift register size
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The invention extracts and eliminates redundant components from each stage. By removing the dedicated discharging voltage source and reducing the number of nodes and switching devices to the minimum necessary (one input node, one output node, and essential transistors), the stage area is significantly reduced while maintaining node control functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If the shift register uses a constant voltage discharging voltage source for each stage, then the node can be discharged, but the technology limitation on forming the shift register in the liquid crystal panel increases

Engineering Contradiction:
Improvenode discharging capabilityVSAvoidintegration capability in liquid crystal panel
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The clock pulse signal performs multiple functions simultaneously: driving the output transistor, discharging the node through the discharge transistor, and providing timing control. This multi-functionality reduces the number of separate voltage sources and control lines needed, making the shift register more adaptable for integration within the liquid crystal panel structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention changes the voltage source parameter from a constant discharging voltage to a time-varying clock pulse signal. This parameter change allows the same signal line to serve multiple purposes and reduces the need for additional dedicated discharging voltage lines, improving adaptability for panel integration.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8553830B2Shift register
Publication Date: 2013.10.08 LG DISPLAY CO LTD
  • US8553830B2 patent drawing
  • US8553830B2 patent drawing
  • US8553830B2 patent drawing

AI summary

A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.