Liquid Crystal Display Fabrication Using Single Mask Photolithography

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Solution Overview

Problem

The existing liquid crystal display (LCD) fabrication processes require a large number of masks, leading to increased complexity, higher production costs, and reduced yield due to the need for multiple photolithography processes, especially when using polycrystalline silicon thin film transistors which demand more intricate pattern formation.

Innovation Solution

The proposed LCD fabrication method simplifies the process by dividing the substrate into thin film transistor regions and storage regions, using fewer masks to form active layers and storage electrodes, thereby reducing the number of photolithography steps and mask usage, while maintaining high electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple masks are used for photolithography processes to form polycrystalline silicon thin film transistor patterns, then manufacturing precision is improved, but device complexity and fabrication cost increase

Engineering Contradiction:
Improvepattern formation precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple photolithography mask processes into a single mask process. The first mask simultaneously forms patterns for both the thin film transistor region and storage region, eliminating the need for separate masks that would traditionally be required for each region, thereby reducing process complexity while maintaining precision

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single mask used in the patent serves multiple functions by simultaneously defining patterns for different regions (thin film transistor region and storage region) and different structures (active layers and storage electrodes), making the mask process universal and eliminating the need for multiple specialized masks

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple photolithography processes are used to form different regions, then manufacturing precision is improved, but production cost and fabrication time increase

Engineering Contradiction:
Improveregion-specific pattern precisionVSAvoidfabrication time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent merges multiple sequential photolithography processes into a single simultaneous process. By using one mask to define patterns for both the thin film transistor region and storage region in the same photolithography step, the fabrication time is significantly reduced while each region still receives the precise patterning it requires

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If more masks are used for pattern formation, then manufacturing precision is improved, but yield is reduced due to increased process steps

Engineering Contradiction:
Improvepattern formation accuracyVSAvoidfabrication yield
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent reduces the number of process steps by combining multiple mask processes into one. Fewer photolithography cycles mean fewer opportunities for process failures, defects, or variations, thereby improving fabrication yield while the single mask maintains the necessary pattern formation accuracy through optimized design

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8953110B2Liquid crystal display and method for fabricating the same
Publication Date: 2015.02.10 LG DISPLAY CO LTD
  • US8953110B2 patent drawing
  • US8953110B2 patent drawing
  • US8953110B2 patent drawing

AI summary

A liquid crystal display includes an insulating substrate having a pixel portion divided into a thin film transistor region and a storage region, a first active layer formed on the substrate to cover at least the thin film transistor region, and a storage electrode formed on the first active layer to selectively cover the storage region.