Source Driver IC Latch Signal Timing for LCD Noise Reduction
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Solution Overview
Problem
LCD devices experience vertical line noise due to power ripples between high-level and low-level voltages during charging and discharging operations, affecting the source driver IC's ability to transfer data effectively.
Innovation Solution
The solution involves generating a latch signal independently from the source output enable (SOE) signal to transfer data from a first latch to a second latch during a horizontal blank time, allowing image data to be outputted to the panel, and setting the falling time of the SOE signal within the blank time to prevent noise caused by power ripples.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the source driver IC charges/discharges the panel load at the falling time of the SOE signal, then data voltages are outputted to the panel, but power ripples occur between high-level voltage (VDD) and low-level voltage (VSS) causing vertical line noise
Solution Approach 1:
The patent applies preliminary action by transferring data from the first latch to the second latch before the SOE signal falls to its active state. Specifically, during the horizontal blanking period before the SOE falling edge, the latch signal activates to complete data transfer in advance. This ensures that when the SOE signal falls and the panel load is charged/discharged, the data transfer operation is already completed, preventing power ripples from interfering with the data transfer process and eliminating vertical line noise while maintaining high-speed data output
2Reliability
If the first latch transfers data to the second latch at the rising time of the SOE signal, then data is latched, but charge sharing occurs until the second switch turns on, causing delay in data output
Solution Approach 1:
The patent uses preliminary action by separating the data transfer timing from the SOE signal rising edge. Instead of transferring data at the SOE rising time, the latch signal is generated during the horizontal blanking period to transfer data in advance. This preliminary data transfer eliminates the delay caused by charge sharing operations that occur when the second switch turns on, while still ensuring accurate data latching before the actual data output phase
Solution Approach 2:
The patent applies segmentation by dividing the data output process into distinct phases: (1) data transfer phase controlled by the latch signal during the horizontal blanking period, and (2) data output phase controlled by the SOE signal falling edge. This segmentation allows the data transfer operation to be completed independently before the power-consuming charge/discharge operation, preventing interference between these two functions and eliminating vertical line noise
Data Source
AI summary
An LCD device and a method of driving the same are provided. The LCD device includes a panel, one or more gate driver IC, a timing controller, and a source driver IC. The gate driver IC sequentially drives a plurality of gate lines formed in the panel. The timing controller controls the gate driver IC. The source driver IC simultaneously transfers image data from a first latch to a second latch according to a latch signal, converts the image data transferred from the second latch into data voltages, and outputs the data voltages to the panel at a falling time of a source output enable signal.