Liquid Crystal Display Reinforced Storage Capacitor Kickback Voltage
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Solution Overview
Problem
Liquid crystal displays face challenges in side visibility and image quality due to parasitic capacitance-induced kickback voltage, which affects the accuracy of luminance display, especially in high-resolution displays with increased thin film transistor area.
Innovation Solution
The implementation of a reinforced storage capacitor configuration, including a storage protrusion and expansion design that minimizes parasitic capacitance between gate and drain electrodes, reduces the kickback voltage by increasing the storage capacitance and optimizing the layout to maintain data voltage across subpixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the thin film transistor area is increased to improve visibility through multiple subpixels, then side visibility is improved, but parasitic capacitance between gate and drain electrodes increases causing kickback voltage
Solution Approach 1:
The pixel is divided into multiple subpixels (first subpixel and second subpixel) with different voltage applications, enabling improved side visibility through directional luminance control while managing parasitic capacitance effects in each segment
Solution Approach 2:
Different voltages are applied to different subpixels within the same pixel (first subpixel receives different voltage than second subpixel), creating local quality variations that improve side visibility while the enlarged storage capacitor provides localized compensation for kickback voltage in affected regions
2Manufacturing precision
If the thin film transistor area is increased for high-resolution displays, then display resolution is improved, but parasitic capacitance increases reducing luminance display accuracy
Solution Approach 1:
The enlarged storage capacitor is configured in advance to compensate for the kickback voltage that will occur when the gate signal transitions, performing preliminary compensation action before the luminance display error occurs, thereby maintaining accuracy in high-resolution displays
Solution Approach 2:
The storage capacitor is designed to generate a counteracting voltage that opposes the kickback voltage effect, applying preliminary anti-action to prevent luminance display accuracy degradation caused by parasitic capacitance in high-resolution configurations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances side visibility and image quality by reducing the kickback voltage, ensuring accurate luminance display and improved image quality, particularly for high-gray scale images.
Implementation Method 1
The liquid crystal display generates an electric field in the liquid crystal layer by applying a voltage to the field generating electrodes
Implementation Method 2
adjust alignment of liquid crystal molecules of the liquid crystal layer
Implementation Method 3
control polarization of incident light
Implementation Method 4
the voltages of the drain electrode and the pixel electrodes may drop by a parasitic capacitance between the gate electrode and the drain electrode of the thin film transistor
Data Source
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AI summary
A liquid crystal display includes: a gate line (121) extending in a first direction (x); a first data line (171) and a second data line (171) extending in a second direction (y); a thin film transistor, TFT (Qa-c) including a gate electrode (124a-c) connected to the gate line, a source electrode (173a-c) connected to the first data line, and a drain electrode (175a-c); a vertical storage electrode line (177) extending between the first and second data lines; a passivation layer (180p) disposed on the TFT and the vertical storage electrode line; an insulating layer (180q) disposed on the passivation layer; and a subpixel electrode (191a-b) disposed on the insulating layer, connected to the drain electrode, wherein the vertical storage electrode line includes an expansion (176), the insulating layer includes an opening (186q) exposing a portion of the passivation layer overlapping the expansion, and wherein the subpixel electrode includes a protrusion (196b) overlapping the expansion, a reinforced storage capacitor (Cst2) being formed between the protrusion and the expansion.