LCD Subpixel Electrode Arrangement for Defect Reduction
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Solution Overview
Problem
Conventional liquid crystal display (LCD) manufacturing processes face high defect rates due to complex element disposition, particularly in the formation of gate lines, data lines, and TFT electrodes, which complicates the production of larger and thinner displays needed for modern technology.
Innovation Solution
The LCD design incorporates a substrate with gate lines and data lines arranged in a lattice, featuring unit pixels with subpixel electrodes connected by switching devices, including a voltage-up and voltage-down capacitor configuration to adjust voltages, optimizing the arrangement of TFTs and electrodes to reduce defects and enhance visibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing processes are used with complex element disposition, then LCD functionality is achieved, but defect rate increases
Solution Approach 1:
The patent applies asymmetry by alternating the arrangement order of subpixel electrodes between adjacent gate lines. Specifically, odd-numbered gate lines have subpixel electrodes arranged in one sequence while even-numbered gate lines have them arranged in the opposite sequence. This asymmetric pattern simplifies the overall manufacturing process by creating a regular alternating pattern that reduces complexity in element disposition while maintaining low defect rates.
2Illumination intensity
If subpixel electrodes are capacitively coupled to enhance lateral visibility, then visibility improves, but manufacturing complexity increases
Solution Approach 1:
The patent merges the functions of multiple switching devices by having the third switching device control both the voltage-up capacitor and voltage-down capacitor. This consolidation reduces the total number of switching devices needed while still achieving the capacitive coupling effect that enhances lateral visibility, thereby improving the benefit while reducing manufacturing complexity.
Solution Approach 2:
The third switching device serves multiple functions: it controls the voltage-up capacitor, controls the voltage-down capacitor, and manages the capacitive coupling between subpixel electrodes. This multi-functionality reduces the overall number of components needed in the display device while maintaining the enhanced lateral visibility effect.
3Manufacturing precision
If voltage control is enhanced for better image quality, then display performance improves, but device complexity increases
Solution Approach 1:
The patent segments the voltage control function into two separate capacitors: a voltage-up capacitor that increases voltage and a voltage-down capacitor that decreases voltage. This segmentation allows for precise voltage control of subpixel electrodes while organizing the complexity into manageable, distinct components with specific functions, making the overall system more controllable and manufacturable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes defect rates, improves lateral visibility, and allows for easier repair by enabling precise control of subpixel voltages, enhancing the overall performance and reliability of LCDs.
Implementation Method 1
The alignment of liquid molecules of the liquid crystal layer is altered when voltages are applied to the electrodes and thus, the amount of light transmitted may be controlled
Implementation Method 2
the subpixel electrodes may be capacitively coupled to each other
Data Source
AI summary
A liquid crystal display (LCD) includes a substrate, gate lines that extend in a first direction, data lines that cross the gate lines and extend in a second direction, and unit pixels. Each unit pixel includes a first subpixel electrode connected to an ith gate line by a first switching device, a second subpixel electrode connected to the ith gate line by a second switching device, and a third switching device including a drain electrode capacitively coupled to the second subpixel electrode and a source electrode connected to the first subpixel electrode. The third switching device is connected to an (i+1)th gate line, the first and second subpixel electrodes between the ith gate line and the (i+1)th gate line are arranged in an order opposite that of the first and second subpixel electrodes between the (i+I)th gate line and an (i+2)th gate line.