LCD Sub-Pixel Gate Timing for Wide Viewing Angle Displays
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Solution Overview
Problem
Liquid crystal displays (LCDs) experience image distortion at different viewing angles due to the increase in size, which existing technologies have not effectively addressed.
Innovation Solution
The implementation of a display apparatus with a panel part comprising gate lines, data lines, and pixels, where each pixel includes a first and second sub-pixel connected to different gate lines and a common data line, with a data driver and gate driver system that applies specific gate and data signals with varying voltage levels and temporal overlaps to reduce distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the size of the liquid crystal display is increased to display more image information, then the display area is improved, but image distortion at different viewing angles worsens
Solution Approach 1:
Each pixel is divided into two sub-pixels (first sub-pixel and second sub-pixel) connected to different gate lines. This segmentation allows independent control of sub-pixels through different gate signals, enabling compensation for viewing angle distortion while maintaining large display area.
Solution Approach 2:
Different gate signals with different voltage levels are applied to different sub-pixels based on their specific positions and viewing angle characteristics. This local differentiation of signal quality compensates for the distortion that occurs in different regions of the large display panel.
2Manufacturing precision
If gate signals are applied to control sub-pixels, then image clarity is improved, but response time increases due to charging requirements
Solution Approach 1:
The first sub-pixel is precharged during the period when the second sub-pixel is being charged. This preliminary action ensures that both sub-pixels are fully charged and ready for display before the frame is completed, maintaining image clarity without extending the overall response time.
Solution Approach 2:
The gate driver continuously applies gate signals to different sub-pixels in an overlapping manner. While the second sub-pixel is being charged, the first sub-pixel is already being charged, creating continuous useful action that maintains clarity while optimizing response time.
3Manufacturing precision
If different voltage levels are applied to different sub-pixels, then viewing angle distortion is reduced, but device complexity increases
Solution Approach 1:
The gate driver is segmented into multiple stages, with odd-numbered stages controlling first sub-pixels and even-numbered stages controlling second sub-pixels. This segmentation allows different voltage levels to be applied to different sub-pixel types while maintaining a structured, manageable driver architecture.
Solution Approach 2:
The gate driver stages are designed with universal functionality to handle different voltage levels and signal types. Each stage can operate with different voltage amplitudes and phases, allowing the same basic circuit structure to serve multiple functions and reduce overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces image distortion at different viewing angles, improving the viewing range and response time of the LCD by ensuring that each sub-pixel is charged with appropriate voltages during specific intervals, thereby maintaining image clarity across various perspectives.
Implementation Method 1
an electric field is applied to the liquid crystals to control an intensity of an electric field between the two substrates to adjust an amount of light passing therethrough
Implementation Method 2
The liquid crystal display includes two substrates spaced apart from each other at a predetermined distance and having liquid crystals disposed therebetween
Data Source
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AI summary
A display apparatus includes a panel part having a plurality of gate lines, a plurality of data lines, a plurality of pixels, a data driver and a gate driver part. Each pixel of the plurality of pixels includes a first sub-pixel and a second sub-pixel. The first sub-pixel is connected to a first gate line of the plurality of gate lines and the second sub-pixel is connected to a second gate line of the plurality of gate lines. The first sub-pixel and the second sub-pixel are each commonly connected to one data line of the plurality of data lines. The gate driver part is disposed on the panel part and applies a plurality of gate signals to the plurality of gate lines. A current gate signal of the plurality of gate signals is temporally overlapped with a previous gate signal for a predetermined time interval.