Electrostatic Preventing Pattern for LCD Test Pad Protection
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Solution Overview
Problem
Static electricity during the array test process for LCD panel manufacturing can damage thin-film transistors and reduce manufacturing yield due to accumulated electric charges flowing through test pads and lines.
Innovation Solution
A mother substrate design incorporating an electrostatic preventing pattern with multiple edges or alternating wide and narrow sections, connected to test pads and signal lines, to dissipate static electricity and prevent damage to the display cell components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If array test pads are formed on the mother substrate to facilitate testing, then testing capability is improved, but static electricity damage to thin-film transistors increases
Solution Approach 1:
An electrostatic preventing pattern is introduced as an intermediary element between the test pad and the signal line. This pattern includes multiple edges (first edge, second edge, third edge, fourth edge) that create a distributed capacitance effect, acting as a mediator to dissipate static electricity before it reaches the thin-film transistors, thus protecting the device while maintaining test pad functionality
Solution Approach 2:
The electrostatic preventing pattern extends the connection path from the test pad to the signal line by introducing multiple edges and a more complex geometric configuration. This increases the surface area and distributed capacitance along the signal path, providing an additional dimensional approach to static electricity dissipation without affecting the basic test pad function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The electrostatic preventing pattern effectively reduces the level of static electricity, protecting the gate driving circuit, transistors, and pixels from damage, thereby improving manufacturing yield and product quality.
Implementation Method 1
The electrostatic preventing pattern effectively reduces the level of static electricity, protecting the gate driving circuit, transistors, and pixels from damage
Data Source
AI summary
A mother substrate for a display device includes a display cell, a test pad, an electrostatic preventing pattern and a connecting line. The display cell includes a pad and a signal line. The signal line is extended from the pad and is electrically connected to a pixel. The test pad is disposed out of the display cell and is electrically connected to the signal line of the display cell and receives a test signal. The electrostatic preventing pattern electrically connected to the test pad is disposed adjacent to the test pad and includes a plurality of edges. The electrostatic preventing pattern is formed from a metal pattern. The connecting line is extended from the electrostatic preventing pattern and is electrically connected to the pad of the display cell.


