LCD Timing Controller Clock Signal Segmentation for EMI Reduction
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Solution Overview
Problem
LCD devices face significant challenges with high electric power consumption and Electro-Magnetic Interfering (EMI) performance, particularly at the TTL interface, due to the large number of data bus lines required for image data transmission, which worsens with increasing display panel size and resolution.
Innovation Solution
The method involves generating multiple CLK signals with different frequencies and phases, which are used by the timing controller to transmit image data to source drivers, thereby reducing EMI energy accumulation and improving power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the TTL interface uses a large number of data bus lines to transmit image data, then the image data transmission capability is improved, but the electric power consumption and EMI performance deteriorate
Solution Approach 1:
The patent segments the image data transmission into multiple channels (first image data channel and second image data channel), each operating at lower frequency. This allows the system to maintain high overall transmission capability while each individual channel consumes less power and generates less EMI, resolving the contradiction between transmission capability and power consumption/EMI performance
2Productivity
If the TTL interface uses a large number of data bus lines to transmit image data, then the image data transmission capability is improved, but the EMI performance deteriorates
Solution Approach 1:
The patent divides the image data into first image data and second image data, transmitted through separate channels with different clock signals. This segmentation reduces the EMI generated by each individual data bus line while maintaining overall high transmission capability, effectively resolving the contradiction between transmission capability and EMI performance
3Manufacturing precision
If the display panel size and resolution are increased, then the display quality is improved, but the number of CLK signals increases leading to higher power consumption and EMI
Solution Approach 1:
The patent segments the clock signal system into multiple lower-frequency clock signals (first CLK signal and second CLK signal) instead of using a single high-frequency clock signal. This allows the system to support high-resolution displays while keeping each clock signal's frequency and power consumption lower, resolving the contradiction between display quality and power consumption
4Manufacturing precision
If the display panel size and resolution are increased, then the display quality is improved, but the EMI performance deteriorates due to increased CLK signals
Solution Approach 1:
The patent segments the clock signal transmission into multiple channels with different phases and frequencies. This segmentation disperses the EMI energy that would otherwise accumulate from a single high-frequency clock signal, allowing high-resolution display support while maintaining good EMI performance
Data Source
AI summary
A method for improving the EMI performance of an LCD device is disclosed, adapting for a point-to-point transistor transistor logic interface of the LCD device. The disclosed method comprises the following steps: receiving a plurality of image data based on a data CLK signal; providing a first CLK signal and a second CLK signal to a plurality of source drivers by a timing controller, wherein the frequencies of the first CLK signal and the second CLK signal are smaller than the frequency of the data CLK signal, the phase of the first CLK signal is different from the phase of the second CLK signal; and the timing controller transmitting a plurality of first image data to the plurality of source drivers based on the first CLK signal, and the timing controller transmitting a plurality of second image data to the plurality of source drivers based on the second CLK signal.


