LCD Timing Controller Impulse Driving Without Frequency Multiplication
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Solution Overview
Problem
Liquid crystal displays (LCDs) using the black data insertion method experience increased costs and heating due to frequency multiplication in the timing controller, leading to degraded gray scale representation and charging characteristics, resulting in a blurred image.
Innovation Solution
A liquid crystal display and driving method that employs a timing controller, data driving circuit, and gate driving circuit to generate specific timing control signals, allowing for impulse driving without increasing the driving frequency, thereby reducing heating and costs by alternately applying data and black gray voltages to the liquid crystal panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the black data insertion method is used to achieve impulse driving effect, then motion blurring is reduced, but circuit heating and costs increase due to frequency multiplication
Solution Approach 1:
The patent changes the timing parameters of gate pulses instead of increasing data transmission frequency. By adjusting the start timing and pulse width of gate pulses, the invention achieves impulse driving effect without requiring frequency multiplication, thus avoiding increased circuit heating while maintaining image clarity.
Solution Approach 2:
The patent applies periodic gate pulses with specific timing characteristics to achieve impulse driving. By controlling the periodic gate pulse signals to have different start timings and pulse widths for different blocks, the invention creates the impulse effect needed for clear motion display without increasing overall system frequency.
2Reliability
If frequency multiplication is performed in the timing controller to enable black data insertion, then impulse driving is achieved, but device complexity and costs increase
Solution Approach 1:
The patent achieves impulse driving by changing gate pulse parameters (start timing and pulse width) rather than multiplying the data clock frequency. This approach eliminates the need for complex frequency multiplication circuits in the timing controller, thereby reducing device complexity and costs while maintaining the impulse driving effect.
Solution Approach 2:
The patent divides the display screen into multiple blocks and applies different gate pulse timing characteristics to different blocks. This segmentation allows selective impulse driving in specific regions without requiring global frequency multiplication, simplifying the overall controller design.
3Productivity
If data transmission frequency is increased to support black data insertion, then impulse driving is enabled, but EMI and heating of data driving circuit increase
Solution Approach 1:
The patent changes the timing parameters of gate pulses instead of increasing data transmission frequency. By controlling when gate pulses start and how long they last, the invention achieves impulse driving effect without increasing the frequency of data transmission, thereby avoiding increased EMI and heating in the data driving circuit.
Data Source
AI summary
A liquid crystal display and driving method thereof are disclosed. The liquid crystal display according to an embodiment of the invention includes a liquid crystal panel having liquid crystal cells in a matrix array at crossings of data lines and gate lines; a timing controller for receiving a digital video data and synchronous signals, and generating a source output enable signal, a first gate start pulse, a second gate start pulse having a pulse width different from that of the first gate start pulse, a gate shift clock, a first gate output enable signal and a second gate output enable signal; a data driving circuit for providing a data voltage to the data lines in response to a first logic value of the source output enable signal, and any one black gray voltage of a charge share voltage and a precharge voltage to the data lines in response to a second logic value of the source output enable signal; and a gate driving circuit for providing a first gate pulse in synchronization with the data voltage and a second gate pulse in synchronization with the black gray voltage to the gate lines, in response to the first gate start pulse, the second gate start pulse, the gate shift clock, the first gate output enable signal and the second gate output enable signal.