Timing Controller Reduces LCD Power via Adaptive Memory Updates
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Solution Overview
Problem
Liquid crystal display (LCD) drivers face challenges in reducing power consumption while effectively displaying multiple colors and moving images, as passive matrix LCDs consume less power but struggle with color and image quality, while active matrix LCDs are better suited for these but consume more power.
Innovation Solution
A timing controller is introduced that includes an n-bit counter, determination circuit, NAND gates, and a memory device to control the scan and data line driving circuits, generating internal data enable signals based on vertical synchronous and data enable signals, allowing for efficient storage and transmission of display data only when necessary, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If passive matrix type liquid crystal panels are used, then power consumption is reduced, but the ability to display multiple colors and moving images is limited
Solution Approach 1:
The patent implements dynamic control of memory update operations by generating internal data enable signals with periods that are integral multiples of the data enable signal period. This allows the system to adaptively adjust memory update frequency based on actual display requirements, enabling passive matrix LCD to dynamically optimize between power consumption and display quality for multiple colors and moving images
Solution Approach 2:
The patent changes the parameter of memory update frequency by using internal data enable signals with periods that are integral multiples of the data enable signal period. This parameter adjustment allows the system to reduce memory update operations to levels compatible with passive matrix LCD while still supporting multiple colors and moving images display
2Adaptability or versatility
If active matrix type liquid crystal panels are used, then the ability to display multiple colors and moving images is improved, but power consumption increases
Solution Approach 1:
The patent extracts and eliminates unnecessary memory update operations by using timing control circuits to generate internal data enable signals only when display data needs to be updated. This extraction of redundant update operations reduces power consumption while maintaining the active matrix LCD's capability to display multiple colors and moving images
Solution Approach 2:
The patent implements periodic memory update operations synchronized with the vertical synchronous signal and data enable signal. By using internal data enable signals with periods that are integral multiples of the data enable signal period, the system performs memory updates only at appropriate intervals, reducing power consumption while maintaining display quality
3Reliability
If memory update operations are performed continuously, then display data is always available, but power consumption increases
Solution Approach 1:
The patent performs preliminary action by pre-generating internal data enable signals based on the data enable signal period before actual memory updates are needed. This allows the timing control circuit to prepare update operations in advance and execute them only when necessary, ensuring display data availability while reducing continuous power consumption
Solution Approach 2:
The patent implements feedback control by using the vertical synchronous signal and data enable signal to generate internal data enable signals. The timing control circuit continuously monitors these signals and adjusts memory update operations accordingly, ensuring data availability only when needed while reducing overall power consumption
Data Source
AI summary
Provided are a timing controller, a liquid crystal display (LCD) driver including the same, and a method of outputting display data, where the timing controller receives a vertical synchronous signal and a data enable signal, generates an internal data enable signal having a period that is longer than the period of the data enable signal in response to the vertical synchronous signal and the data enable signal, and updates a memory using the internal data enable signal; where the LCD driver including the timing controller outputs display data stored in a memory device based on the internal data enable signal; where a data line driving circuit drives data lines based on the output display data; and where the method of outputting display data is performed by the LCD driver.


